Moved proj up
This commit is contained in:
@@ -0,0 +1,77 @@
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/*
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* FreeRTOS Kernel V11.3.0
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*/
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#ifndef FREERTOS_SDK_CONFIG_H
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#define FREERTOS_SDK_CONFIG_H
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#ifndef __ASSEMBLER__
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#include "FreeRTOSConfig.h"
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#include "rp2040_config.h"
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#ifndef PICO_USE_MALLOC_MUTEX
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/* malloc needs to be made thread safe */
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#define PICO_USE_MALLOC_MUTEX 1
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#endif /* PICO_USE_MALLOC_MUTEX */
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#if ( configSUPPORT_PICO_SYNC_INTEROP == 1 )
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/* increase the amount of time it may reasonably take to wake us up */
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#ifndef PICO_TIME_SLEEP_OVERHEAD_ADJUST_US
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#define PICO_TIME_SLEEP_OVERHEAD_ADJUST_US 150
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#endif
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#define lock_owner_id_t uint32_t
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extern uint32_t ulPortLockGetCurrentOwnerId( void );
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#define lock_get_caller_owner_id() ulPortLockGetCurrentOwnerId()
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#define LOCK_INVALID_OWNER_ID ( ( uint32_t ) -1 )
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struct lock_core;
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#ifndef lock_internal_spin_unlock_with_wait
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extern void vPortLockInternalSpinUnlockWithWait( struct lock_core * pxLock,
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uint32_t ulSave );
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#define lock_internal_spin_unlock_with_wait( lock, save ) vPortLockInternalSpinUnlockWithWait( lock, save )
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#endif
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#ifndef lock_internal_spin_unlock_with_notify
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extern void vPortLockInternalSpinUnlockWithNotify( struct lock_core * pxLock,
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uint32_t save );
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#define lock_internal_spin_unlock_with_notify( lock, save ) vPortLockInternalSpinUnlockWithNotify( lock, save );
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#endif
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#ifndef lock_internal_spin_unlock_with_best_effort_wait_or_timeout
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extern bool xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout( struct lock_core * pxLock,
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uint32_t ulSave,
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absolute_time_t uxUntil );
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#define lock_internal_spin_unlock_with_best_effort_wait_or_timeout( lock, save, until ) \
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xPortLockInternalSpinUnlockWithBestEffortWaitOrTimeout( lock, save, until )
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#endif
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#endif /* configSUPPORT_PICO_SYNC_INTEROP */
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#if ( configSUPPORT_PICO_TIME_INTEROP == 1 )
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extern void xPortSyncInternalYieldUntilBefore( absolute_time_t t );
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#define sync_internal_yield_until_before( t ) xPortSyncInternalYieldUntilBefore( t )
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#endif /* configSUPPORT_PICO_TIME_INTEROP */
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#endif /* __ASSEMBLER__ */
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#endif /* ifndef FREERTOS_SDK_CONFIG_H */
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@@ -0,0 +1,293 @@
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/*
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* FreeRTOS Kernel V11.3.0
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* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
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*
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* SPDX-License-Identifier: MIT AND BSD-3-Clause
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* https://www.FreeRTOS.org
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* https://github.com/FreeRTOS
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*
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*/
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#ifndef PORTMACRO_H
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#define PORTMACRO_H
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/* *INDENT-OFF* */
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#ifdef __cplusplus
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extern "C" {
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#endif
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/* *INDENT-ON* */
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#include "pico.h"
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#include "hardware/sync.h"
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#include "rp2040_config.h"
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/*-----------------------------------------------------------
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* Port specific definitions.
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*
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* The settings in this file configure FreeRTOS correctly for the
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* given hardware and compiler.
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*
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* These settings should not be altered.
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*-----------------------------------------------------------
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*/
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/* Type definitions. */
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#define portCHAR char
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#define portFLOAT float
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#define portDOUBLE double
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#define portLONG long
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#define portSHORT short
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#define portSTACK_TYPE uint32_t
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#define portBASE_TYPE long
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typedef portSTACK_TYPE StackType_t;
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typedef int32_t BaseType_t;
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typedef uint32_t UBaseType_t;
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#if ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_16_BITS )
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typedef uint16_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffff
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#elif ( configTICK_TYPE_WIDTH_IN_BITS == TICK_TYPE_WIDTH_32_BITS )
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typedef uint32_t TickType_t;
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#define portMAX_DELAY ( TickType_t ) 0xffffffffUL
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/* 32-bit tick type on a 32-bit architecture, so reads of the tick count do
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* not need to be guarded with a critical section. */
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#define portTICK_TYPE_IS_ATOMIC 1
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#else
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#error configTICK_TYPE_WIDTH_IN_BITS set to unsupported tick type width.
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#endif
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/*-----------------------------------------------------------*/
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/* Architecture specifics. */
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#define portSTACK_GROWTH ( -1 )
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#define portTICK_PERIOD_MS ( ( TickType_t ) 1000 / configTICK_RATE_HZ )
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#define portBYTE_ALIGNMENT 8
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#define portDONT_DISCARD __attribute__( ( used ) )
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/* We have to use PICO_DIVIDER_DISABLE_INTERRUPTS as the source of truth rather than our config,
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* as our FreeRTOSConfig.h header cannot be included by ASM code - which is what this affects in the SDK */
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#define portUSE_DIVIDER_SAVE_RESTORE !PICO_DIVIDER_DISABLE_INTERRUPTS
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#if portUSE_DIVIDER_SAVE_RESTORE
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#define portSTACK_LIMIT_PADDING 4
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#endif
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/*-----------------------------------------------------------*/
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/* Scheduler utilities. */
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extern void vPortYield( void );
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#define portNVIC_INT_CTRL_REG ( *( ( volatile uint32_t * ) 0xe000ed04 ) )
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#define portNVIC_PENDSVSET_BIT ( 1UL << 28UL )
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#define portYIELD() vPortYield()
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#define portEND_SWITCHING_ISR( xSwitchRequired ) \
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do \
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{ \
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if( xSwitchRequired ) \
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{ \
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traceISR_EXIT_TO_SCHEDULER(); \
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portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; \
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} \
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else \
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{ \
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traceISR_EXIT(); \
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} \
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} while( 0 )
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#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
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/*-----------------------------------------------------------*/
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/* Exception handlers */
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#if ( configUSE_DYNAMIC_EXCEPTION_HANDLERS == 0 )
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/* We only need to override the SDK's weak functions if we want to replace them at compile time */
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#define vPortSVCHandler isr_svcall
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#define xPortPendSVHandler isr_pendsv
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#define xPortSysTickHandler isr_systick
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#endif
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/*-----------------------------------------------------------*/
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/* Multi-core */
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#define portMAX_CORE_COUNT 2
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/* Check validity of number of cores specified in config */
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#if ( configNUMBER_OF_CORES < 1 || portMAX_CORE_COUNT < configNUMBER_OF_CORES )
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#error "Invalid number of cores specified in config!"
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#endif
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#if ( configTICK_CORE < 0 || configTICK_CORE > configNUMBER_OF_CORES )
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#error "Invalid tick core specified in config!"
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#endif
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/* FreeRTOS core id is always zero based, so always 0 if we're running on only one core */
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#if configNUMBER_OF_CORES == portMAX_CORE_COUNT
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#define portGET_CORE_ID() get_core_num()
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#else
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#define portGET_CORE_ID() 0
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#endif
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#define portCHECK_IF_IN_ISR() \
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( { \
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uint32_t ulIPSR; \
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__asm volatile ( "mrs %0, IPSR" : "=r" ( ulIPSR )::); \
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( ( uint8_t ) ulIPSR ) > 0; } )
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/* Use #define rather than inline method to make it easier for user code
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* to work with kernel versions both with and without xPortIsInsideInterrupt */
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#define xPortIsInsideInterrupt() ((BaseType_t)portCHECK_IF_IN_ISR())
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void vYieldCore( int xCoreID );
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#define portYIELD_CORE( a ) vYieldCore( a )
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/*-----------------------------------------------------------*/
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/* Critical nesting count management. */
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#define portCRITICAL_NESTING_IN_TCB 0
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extern UBaseType_t uxCriticalNestings[ configNUMBER_OF_CORES ];
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#define portGET_CRITICAL_NESTING_COUNT( xCoreID ) ( uxCriticalNestings[ ( xCoreID ) ] )
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#define portSET_CRITICAL_NESTING_COUNT( xCoreID, x ) ( uxCriticalNestings[ ( xCoreID ) ] = ( x ) )
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#define portINCREMENT_CRITICAL_NESTING_COUNT( xCoreID ) ( uxCriticalNestings[ ( xCoreID ) ]++ )
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#define portDECREMENT_CRITICAL_NESTING_COUNT( xCoreID ) ( uxCriticalNestings[ ( xCoreID ) ]-- )
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/*-----------------------------------------------------------*/
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/* Critical section management. */
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#define portSET_INTERRUPT_MASK() \
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( { \
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uint32_t ulState; \
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__asm volatile ( "mrs %0, PRIMASK" : "=r" ( ulState )::); \
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__asm volatile ( " cpsid i " ::: "memory" ); \
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ulState; } )
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#define portCLEAR_INTERRUPT_MASK( ulState ) __asm volatile ( "msr PRIMASK,%0" ::"r" ( ulState ) : )
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extern uint32_t ulSetInterruptMaskFromISR( void ) __attribute__( ( naked ) );
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extern void vClearInterruptMaskFromISR( uint32_t ulMask ) __attribute__( ( naked ) );
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#define portSET_INTERRUPT_MASK_FROM_ISR() ulSetInterruptMaskFromISR()
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#define portCLEAR_INTERRUPT_MASK_FROM_ISR( x ) vClearInterruptMaskFromISR( x )
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#define portDISABLE_INTERRUPTS() __asm volatile ( " cpsid i " ::: "memory" )
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#define portENABLE_INTERRUPTS() __asm volatile ( " cpsie i " ::: "memory" )
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#if ( configNUMBER_OF_CORES == 1 )
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extern void vPortEnterCritical( void );
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extern void vPortExitCritical( void );
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#define portENTER_CRITICAL() vPortEnterCritical()
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#define portEXIT_CRITICAL() vPortExitCritical()
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#else
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extern void vTaskEnterCritical( void );
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extern void vTaskExitCritical( void );
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extern UBaseType_t vTaskEnterCriticalFromISR( void );
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extern void vTaskExitCriticalFromISR( UBaseType_t uxSavedInterruptStatus );
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#define portENTER_CRITICAL() vTaskEnterCritical()
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#define portEXIT_CRITICAL() vTaskExitCritical()
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#define portENTER_CRITICAL_FROM_ISR() vTaskEnterCriticalFromISR()
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#define portEXIT_CRITICAL_FROM_ISR( x ) vTaskExitCriticalFromISR( x )
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#endif /* if ( configNUMBER_OF_CORES == 1 ) */
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#define portRTOS_SPINLOCK_COUNT 2
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#if PICO_SDK_VERSION_MAJOR < 2
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__force_inline static bool spin_try_lock_unsafe(spin_lock_t *lock) {
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return *lock;
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}
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#endif
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/* Note this is a single method with uxAcquire parameter since we have
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* static vars, the method is always called with a compile time constant for
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* uxAcquire, and the compiler should do the right thing! */
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static inline void vPortRecursiveLock( BaseType_t xCoreID,
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uint32_t ulLockNum,
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spin_lock_t * pxSpinLock,
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BaseType_t uxAcquire )
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{
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static volatile uint8_t ucOwnedByCore[ portMAX_CORE_COUNT ][portRTOS_SPINLOCK_COUNT];
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static volatile uint8_t ucRecursionCountByLock[ portRTOS_SPINLOCK_COUNT ];
|
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|
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configASSERT( ulLockNum < portRTOS_SPINLOCK_COUNT );
|
||||
|
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if( uxAcquire )
|
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{
|
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if (!spin_try_lock_unsafe(pxSpinLock)) {
|
||||
if( ucOwnedByCore[ xCoreID ][ ulLockNum ] )
|
||||
{
|
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configASSERT( ucRecursionCountByLock[ ulLockNum ] != 255u );
|
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ucRecursionCountByLock[ ulLockNum ] = ucRecursionCountByLock[ ulLockNum ] + 1;
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return;
|
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}
|
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spin_lock_unsafe_blocking(pxSpinLock);
|
||||
}
|
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configASSERT( ucRecursionCountByLock[ ulLockNum ] == 0 );
|
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ucRecursionCountByLock[ ulLockNum ] = 1;
|
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ucOwnedByCore[ xCoreID ][ ulLockNum ] = 1;
|
||||
}
|
||||
else
|
||||
{
|
||||
configASSERT( ( ucOwnedByCore[ xCoreID ] [ulLockNum ] ) != 0 );
|
||||
configASSERT( ucRecursionCountByLock[ ulLockNum ] != 0 );
|
||||
|
||||
ucRecursionCountByLock[ ulLockNum ] = ucRecursionCountByLock[ ulLockNum ] - 1;
|
||||
if ( ucRecursionCountByLock[ ulLockNum ] == 0U )
|
||||
{
|
||||
ucOwnedByCore[ xCoreID ] [ ulLockNum ] = 0;
|
||||
spin_unlock_unsafe(pxSpinLock);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if ( configNUMBER_OF_CORES == 1 )
|
||||
#define portGET_ISR_LOCK( xCoreID )
|
||||
#define portRELEASE_ISR_LOCK( xCoreID )
|
||||
#define portGET_TASK_LOCK( xCoreID )
|
||||
#define portRELEASE_TASK_LOCK( xCoreID )
|
||||
#else
|
||||
#define portGET_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdTRUE )
|
||||
#define portRELEASE_ISR_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 0, spin_lock_instance( configSMP_SPINLOCK_0 ), pdFALSE )
|
||||
#define portGET_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdTRUE )
|
||||
#define portRELEASE_TASK_LOCK( xCoreID ) vPortRecursiveLock( ( xCoreID ), 1, spin_lock_instance( configSMP_SPINLOCK_1 ), pdFALSE )
|
||||
#endif
|
||||
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Tickless idle/low power functionality. */
|
||||
#ifndef portSUPPRESS_TICKS_AND_SLEEP
|
||||
extern void vPortSuppressTicksAndSleep( TickType_t xExpectedIdleTime );
|
||||
#define portSUPPRESS_TICKS_AND_SLEEP( xExpectedIdleTime ) vPortSuppressTicksAndSleep( xExpectedIdleTime )
|
||||
#endif
|
||||
/*-----------------------------------------------------------*/
|
||||
|
||||
/* Task function macros as described on the FreeRTOS.org WEB site. */
|
||||
#define portTASK_FUNCTION_PROTO( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
#define portTASK_FUNCTION( vFunction, pvParameters ) void vFunction( void * pvParameters )
|
||||
|
||||
#define portNOP() __asm volatile ( "nop" )
|
||||
|
||||
#define portMEMORY_BARRIER() __asm volatile ( "" ::: "memory" )
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* PORTMACRO_H */
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* FreeRTOS Kernel V11.3.0
|
||||
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
|
||||
* Copyright (c) 2021 Raspberry Pi (Trading) Ltd.
|
||||
*
|
||||
* SPDX-License-Identifier: MIT AND BSD-3-Clause
|
||||
*
|
||||
* Permission is hereby granted, free of charge, to any person obtaining a copy of
|
||||
* this software and associated documentation files (the "Software"), to deal in
|
||||
* the Software without restriction, including without limitation the rights to
|
||||
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
|
||||
* the Software, and to permit persons to whom the Software is furnished to do so,
|
||||
* subject to the following conditions:
|
||||
*
|
||||
* The above copyright notice and this permission notice shall be included in all
|
||||
* copies or substantial portions of the Software.
|
||||
*
|
||||
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
|
||||
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
|
||||
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
|
||||
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
|
||||
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
|
||||
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
|
||||
*
|
||||
* https://www.FreeRTOS.org
|
||||
* https://github.com/FreeRTOS
|
||||
*/
|
||||
|
||||
#ifndef RP2040_CONFIG_H
|
||||
#define RP2040_CONFIG_H
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
/* configUSE_DYNAMIC_EXCEPTION_HANDLERS == 1 means set the exception handlers dynamically on cores
|
||||
* that need them in case the user has set up distinct vector table offsets per core
|
||||
*/
|
||||
#ifndef configUSE_DYNAMIC_EXCEPTION_HANDLERS
|
||||
#if defined( PICO_NO_RAM_VECTOR_TABLE ) && ( PICO_NO_RAM_VECTOR_TABLE == 1 )
|
||||
#define configUSE_DYNAMIC_EXCEPTION_HANDLERS 0
|
||||
#else
|
||||
#define configUSE_DYNAMIC_EXCEPTION_HANDLERS 1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* configSUPPORT_PICO_SYNC_INTEROP == 1 means that SDK pico_sync
|
||||
* sem/mutex/queue etc. will work correctly when called from FreeRTOS tasks
|
||||
*/
|
||||
#ifndef configSUPPORT_PICO_SYNC_INTEROP
|
||||
#if LIB_PICO_SYNC
|
||||
#define configSUPPORT_PICO_SYNC_INTEROP 1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* configSUPPORT_PICO_SYNC_INTEROP == 1 means that SDK pico_time
|
||||
* sleep_ms/sleep_us/sleep_until will work correctly when called from FreeRTOS
|
||||
* tasks, and will actually block at the FreeRTOS level
|
||||
*/
|
||||
#ifndef configSUPPORT_PICO_TIME_INTEROP
|
||||
#if LIB_PICO_TIME
|
||||
#define configSUPPORT_PICO_TIME_INTEROP 1
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#if ( configNUMBER_OF_CORES > 1 )
|
||||
|
||||
/* configTICK_CORE indicates which core should handle the SysTick
|
||||
* interrupts */
|
||||
#ifndef configTICK_CORE
|
||||
#define configTICK_CORE 0
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* This SMP port requires two spin locks, which are claimed from the SDK.
|
||||
* the spin lock numbers to be used are defined statically and defaulted here
|
||||
* to the values nominally set aside for RTOS by the SDK */
|
||||
#ifndef configSMP_SPINLOCK_0
|
||||
#define configSMP_SPINLOCK_0 PICO_SPINLOCK_ID_OS1
|
||||
#endif
|
||||
|
||||
#ifndef configSMP_SPINLOCK_1
|
||||
#define configSMP_SPINLOCK_1 PICO_SPINLOCK_ID_OS2
|
||||
#endif
|
||||
|
||||
/* *INDENT-OFF* */
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
/* *INDENT-ON* */
|
||||
|
||||
#endif /* ifndef RP2040_CONFIG_H */
|
||||
Reference in New Issue
Block a user