commit 229d828271a76e6e7a8979bb7a7515f931eeca1c Author: Timo Niemann Date: Tue Jun 30 15:32:18 2026 +0200 lcd and sd card file listing works diff --git a/.clangd b/.clangd new file mode 100644 index 0000000..437f255 --- /dev/null +++ b/.clangd @@ -0,0 +1,2 @@ +CompileFlags: + Remove: [-f*, -m*] diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..9db8724 --- /dev/null +++ b/.gitignore @@ -0,0 +1,84 @@ +# macOS +.DS_Store +.AppleDouble +.LSOverride + +# Directory metadata +.directory + +# Temporary files +*~ +*.swp +*.swo +*.bak +*.tmp + +# Log files +*.log + +# Build artifacts and directories +**/build/ +build/ +*.o +*.a +*.out +*.exe # For any host-side utilities compiled on Windows + +# ESP-IDF specific build outputs +*.bin +*.elf +*.map +flasher_args.json # Generated in build directory +sdkconfig.old +sdkconfig.ci + +# ESP-IDF dependencies +# For older versions or manual component management +/components/.idf/ +**/components/.idf/ +# For modern ESP-IDF component manager +managed_components/ +# If ESP-IDF tools are installed/referenced locally to the project +.espressif/ + +# CMake generated files +CMakeCache.txt +CMakeFiles/ +cmake_install.cmake +install_manifest.txt +CTestTestfile.cmake + +# Python environment files +*.pyc +*.pyo +*.pyd +__pycache__/ +*.egg-info/ +dist/ + +# Virtual environment folders +venv/ +.venv/ +env/ + +# Language Servers +.clangd/ +.ccls-cache/ +compile_commands.json + +# Windows specific +Thumbs.db +ehthumbs.db +Desktop.ini + +# User-specific configuration files +*.user +*.workspace # General workspace files, can be from various tools +*.suo # Visual Studio Solution User Options +*.sln.docstates # Visual Studio + +.devcontainer + +.vscode/* +!.vscode/extensions.json +!.vscode/settings.example.json \ No newline at end of file diff --git a/CMakeLists.txt b/CMakeLists.txt new file mode 100644 index 0000000..8b4c08b --- /dev/null +++ b/CMakeLists.txt @@ -0,0 +1,8 @@ +# The following lines of boilerplate have to be in your project's +# CMakeLists in this exact order for cmake to work correctly +cmake_minimum_required(VERSION 3.22) + +include($ENV{IDF_PATH}/tools/cmake/project.cmake) +# "Trim" the build. Include the minimal set of components, main, and anything it depends on. +idf_build_set_property(MINIMAL_BUILD ON) +project(display_image_viewer) diff --git a/dependencies.lock b/dependencies.lock new file mode 100644 index 0000000..0aecbc8 --- /dev/null +++ b/dependencies.lock @@ -0,0 +1,57 @@ +dependencies: + espressif/esp_lcd_touch: + component_hash: 3f85a7d95af876f1a6ecca8eb90a81614890d0f03a038390804e5a77e2caf862 + dependencies: + - name: idf + require: private + version: '>=4.4.2' + source: + registry_url: https://components.espressif.com + type: service + version: 1.2.1 + espressif/esp_lcd_touch_gt911: + component_hash: 6029febef66eefd0910d527d7f30292779ccbf22a8dedd2bd69466acf0068a7b + dependencies: + - name: espressif/esp_lcd_touch + registry_url: https://components.espressif.com + require: public + version: ^1.2.0 + - name: idf + require: private + version: '>=5.2' + source: + registry_url: https://components.espressif.com/ + type: service + version: 1.2.0~2 + espressif/esp_lvgl_port: + component_hash: fb6c1fdfe70d4ca39a035d63ca394a35f17ec84ce16ff98ecb13a54155d75da4 + dependencies: + - name: idf + require: private + version: '>=5.2' + - name: lvgl/lvgl + registry_url: https://components.espressif.com + require: public + version: '>=8,<10' + source: + registry_url: https://components.espressif.com/ + type: service + version: 2.8.0~1 + idf: + source: + type: idf + version: 6.0.2 + lvgl/lvgl: + component_hash: 184e532558c1c45fefed631f3e235423d22582aafb4630f3e8885c35281a49ae + dependencies: [] + source: + registry_url: https://components.espressif.com + type: service + version: 9.5.0 +direct_dependencies: +- espressif/esp_lcd_touch_gt911 +- espressif/esp_lvgl_port +- idf +manifest_hash: 469200faacb1f8184474aadd574818ca9f8ac903271356d7355ff8f9d4b2f785 +target: esp32s3 +version: 3.0.0 diff --git a/main/CMakeLists.txt b/main/CMakeLists.txt new file mode 100644 index 0000000..348a222 --- /dev/null +++ b/main/CMakeLists.txt @@ -0,0 +1,3 @@ +idf_component_register(SRCS main.c lcd/lcd.c sd/sd.c + PRIV_REQUIRES spi_flash esp_psram esp_lcd esp_driver_gpio esp_driver_i2c esp_driver_sdspi esp_driver_spi esp_lvgl_port esp_lcd_touch_gt911 fatfs sdmmc + INCLUDE_DIRS ".") diff --git a/main/idf_component.yml b/main/idf_component.yml new file mode 100644 index 0000000..e91ee73 --- /dev/null +++ b/main/idf_component.yml @@ -0,0 +1,18 @@ +## IDF Component Manager Manifest File +dependencies: + ## Required IDF version + idf: + version: '>=5.2.0' + # # Put list of dependencies here + # # For components maintained by Espressif: + # component: "~1.0.0" + # # For 3rd party components: + # username/component: ">=1.0.0,<2.0.0" + # username2/component2: + # version: "~1.0.0" + # # For transient dependencies `public` flag can be set. + # # `public` flag doesn't have an effect dependencies of the `main` component. + # # All dependencies of `main` are public by default. + # public: true + espressif/esp_lcd_touch_gt911: ^1 + espressif/esp_lvgl_port: ^2.8.0~1 diff --git a/main/lcd/lcd.c b/main/lcd/lcd.c new file mode 100644 index 0000000..344c0c5 --- /dev/null +++ b/main/lcd/lcd.c @@ -0,0 +1,288 @@ +#include "lcd/lcd.h" + +#include "driver/gpio.h" +#include "driver/i2c_master.h" +#include "esp_check.h" +#include "esp_idf_version.h" +#include "esp_lcd_panel_io.h" +#include "esp_lcd_panel_ops.h" +#include "esp_lcd_panel_rgb.h" +#include "esp_lcd_touch_gt911.h" +#include "esp_log.h" +#include "esp_lvgl_port.h" + +#define LCD_DATA_WIDTH (16) +#define LCD_RGB_BUFFER_NUMS (2) +#define LCD_DRAW_BUFF_HEIGHT (100) +#define LCD_LVGL_DIRECT_MODE (0) +#define LCD_LVGL_AVOID_TEAR (0) +#define LCD_RGB_BOUNCE_BUFFER_MODE (1) +#define LCD_RGB_BOUNCE_BUFFER_HEIGHT (10) +#define LCD_LVGL_ROTATION (LV_DISPLAY_ROTATION_90) + +#define LCD_GPIO_VSYNC (GPIO_NUM_41) +#define LCD_GPIO_HSYNC (GPIO_NUM_39) +#define LCD_GPIO_DE (GPIO_NUM_40) +#define LCD_GPIO_PCLK (GPIO_NUM_0) +#define LCD_GPIO_DISP (GPIO_NUM_NC) +#define LCD_GPIO_BACKLIGHT (GPIO_NUM_2) +#define LCD_BACKLIGHT_ON_LEVEL (1) +#define LCD_GPIO_DATA0 (GPIO_NUM_8) +#define LCD_GPIO_DATA1 (GPIO_NUM_3) +#define LCD_GPIO_DATA2 (GPIO_NUM_46) +#define LCD_GPIO_DATA3 (GPIO_NUM_9) +#define LCD_GPIO_DATA4 (GPIO_NUM_1) +#define LCD_GPIO_DATA5 (GPIO_NUM_5) +#define LCD_GPIO_DATA6 (GPIO_NUM_6) +#define LCD_GPIO_DATA7 (GPIO_NUM_7) +#define LCD_GPIO_DATA8 (GPIO_NUM_15) +#define LCD_GPIO_DATA9 (GPIO_NUM_16) +#define LCD_GPIO_DATA10 (GPIO_NUM_4) +#define LCD_GPIO_DATA11 (GPIO_NUM_45) +#define LCD_GPIO_DATA12 (GPIO_NUM_48) +#define LCD_GPIO_DATA13 (GPIO_NUM_47) +#define LCD_GPIO_DATA14 (GPIO_NUM_21) +#define LCD_GPIO_DATA15 (GPIO_NUM_14) + +#define TOUCH_I2C_NUM (1) +#define TOUCH_I2C_SCL (GPIO_NUM_20) +#define TOUCH_I2C_SDA (GPIO_NUM_19) +#define TOUCH_RST (GPIO_NUM_NC) +#define TOUCH_INT (GPIO_NUM_NC) + +#define LCD_PANEL_RGB_TIMING() \ + { \ + .pclk_hz = 12 * 1000 * 1000, \ + .h_res = LCD_H_RES, \ + .v_res = LCD_V_RES, \ + .hsync_pulse_width = 4, \ + .hsync_front_porch = 8, \ + .hsync_back_porch = 43, \ + .vsync_pulse_width = 4, \ + .vsync_front_porch = 8, \ + .vsync_back_porch = 12, \ + .flags.pclk_active_neg = true, \ + } + +static const char *TAG = "lcd"; + +static esp_lcd_panel_handle_t lcd_panel; +static esp_lcd_touch_handle_t touch_handle; +static lv_display_t *lvgl_display; +static lv_indev_t *lvgl_touch_indev; + +static esp_err_t init_backlight(void) +{ + const gpio_config_t backlight_config = { + .mode = GPIO_MODE_OUTPUT, + .pin_bit_mask = 1ULL << LCD_GPIO_BACKLIGHT, + }; + ESP_RETURN_ON_ERROR(gpio_config(&backlight_config), TAG, "Backlight GPIO config failed"); + ESP_RETURN_ON_ERROR(gpio_set_level(LCD_GPIO_BACKLIGHT, LCD_BACKLIGHT_ON_LEVEL), TAG, "Backlight GPIO set failed"); + ESP_LOGI(TAG, "Backlight enabled on GPIO%d", LCD_GPIO_BACKLIGHT); + return ESP_OK; +} + +static esp_err_t probe_gt911_address(i2c_master_bus_handle_t i2c_handle, uint32_t *dev_addr) +{ + const uint8_t addresses[] = { + ESP_LCD_TOUCH_IO_I2C_GT911_ADDRESS, + ESP_LCD_TOUCH_IO_I2C_GT911_ADDRESS_BACKUP, + }; + + for (size_t address_index = 0; address_index < sizeof(addresses) / sizeof(addresses[0]); address_index++) { + const uint8_t address = addresses[address_index]; + const esp_err_t probe_ret = i2c_master_probe(i2c_handle, address, 100); + if (probe_ret == ESP_OK) { + *dev_addr = address; + ESP_LOGI(TAG, "GT911 found at I2C address 0x%02x", address); + return ESP_OK; + } + + ESP_LOGW(TAG, "GT911 not found at I2C address 0x%02x: %s", address, esp_err_to_name(probe_ret)); + } + + return ESP_ERR_NOT_FOUND; +} + +static esp_err_t init_rgb_panel(void){ + ESP_LOGI(TAG, "Initialize RGB panel"); + + const esp_lcd_rgb_panel_config_t panel_config = { + .clk_src = LCD_CLK_SRC_PLL160M, +#if ESP_IDF_VERSION < ESP_IDF_VERSION_VAL(5, 3, 0) + .psram_trans_align = 64, +#else + .dma_burst_size = 64, +#endif + .data_width = LCD_DATA_WIDTH, +#if ESP_IDF_VERSION >= ESP_IDF_VERSION_VAL(6, 0, 0) + .in_color_format = LCD_COLOR_FMT_RGB565, +#else + .bits_per_pixel = 16, +#endif + .de_gpio_num = LCD_GPIO_DE, + .pclk_gpio_num = LCD_GPIO_PCLK, + .vsync_gpio_num = LCD_GPIO_VSYNC, + .hsync_gpio_num = LCD_GPIO_HSYNC, + .disp_gpio_num = LCD_GPIO_DISP, + .data_gpio_nums = { + LCD_GPIO_DATA0, + LCD_GPIO_DATA1, + LCD_GPIO_DATA2, + LCD_GPIO_DATA3, + LCD_GPIO_DATA4, + LCD_GPIO_DATA5, + LCD_GPIO_DATA6, + LCD_GPIO_DATA7, + LCD_GPIO_DATA8, + LCD_GPIO_DATA9, + LCD_GPIO_DATA10, + LCD_GPIO_DATA11, + LCD_GPIO_DATA12, + LCD_GPIO_DATA13, + LCD_GPIO_DATA14, + LCD_GPIO_DATA15, + }, + .timings = LCD_PANEL_RGB_TIMING(), + .flags.fb_in_psram = true, + .num_fbs = LCD_RGB_BUFFER_NUMS, +#if LCD_RGB_BOUNCE_BUFFER_MODE + .bounce_buffer_size_px = LCD_H_RES * LCD_RGB_BOUNCE_BUFFER_HEIGHT, +#endif + }; + + ESP_RETURN_ON_ERROR(esp_lcd_new_rgb_panel(&panel_config, &lcd_panel), TAG, "RGB panel create failed"); + ESP_RETURN_ON_ERROR(esp_lcd_panel_init(lcd_panel), TAG, "LCD panel init failed"); + return init_backlight(); +} + +static esp_err_t init_touch(void){ + ESP_LOGI(TAG, "Initialize GT911 touch"); + + i2c_master_bus_handle_t i2c_handle = NULL; + const i2c_master_bus_config_t i2c_config = { + .i2c_port = TOUCH_I2C_NUM, + .sda_io_num = TOUCH_I2C_SDA, + .scl_io_num = TOUCH_I2C_SCL, + .clk_source = I2C_CLK_SRC_DEFAULT, + .glitch_ignore_cnt = 7, + .flags = { + .enable_internal_pullup = true, + }, + }; + ESP_RETURN_ON_ERROR(i2c_new_master_bus(&i2c_config, &i2c_handle), TAG, "I2C bus init failed"); + + esp_lcd_panel_io_i2c_config_t touch_io_config = ESP_LCD_TOUCH_IO_I2C_GT911_CONFIG(); + ESP_RETURN_ON_ERROR(probe_gt911_address(i2c_handle, &touch_io_config.dev_addr), TAG, "GT911 I2C probe failed"); + + esp_lcd_touch_io_gt911_config_t gt911_config = { + .dev_addr = touch_io_config.dev_addr, + }; + + const esp_lcd_touch_config_t touch_config = { + .x_max = LCD_H_RES, + .y_max = LCD_V_RES, + .rst_gpio_num = TOUCH_RST, + .int_gpio_num = TOUCH_INT, + .levels = { + .reset = 0, + .interrupt = 0, + }, + .flags = { + .swap_xy = false, + .mirror_x = false, + .mirror_y = false, + }, + .driver_data = >911_config, + }; + + esp_lcd_panel_io_handle_t touch_io_handle = NULL; + ESP_RETURN_ON_ERROR(esp_lcd_new_panel_io_i2c(i2c_handle, &touch_io_config, &touch_io_handle), TAG, "Touch IO init failed"); + ESP_RETURN_ON_ERROR(esp_lcd_touch_new_i2c_gt911(touch_io_handle, &touch_config, &touch_handle), TAG, "GT911 driver init failed"); + ESP_LOGI(TAG, "GT911 touch ready"); + return ESP_OK; +} + +static esp_err_t init_lvgl(void){ + ESP_LOGI(TAG, "Initialize LVGL port"); + const lvgl_port_cfg_t lvgl_config = ESP_LVGL_PORT_INIT_CONFIG(); + ESP_RETURN_ON_ERROR(lvgl_port_init(&lvgl_config), TAG, "LVGL port init failed"); + + uint32_t buffer_size = LCD_H_RES * LCD_DRAW_BUFF_HEIGHT; +#if LCD_LVGL_DIRECT_MODE + buffer_size = LCD_H_RES * LCD_V_RES; +#endif + + const lvgl_port_display_cfg_t display_config = { + .panel_handle = lcd_panel, + .buffer_size = buffer_size, + .double_buffer = false, + .hres = LCD_H_RES, + .vres = LCD_V_RES, + .monochrome = false, +#if LVGL_VERSION_MAJOR >= 9 + .color_format = LV_COLOR_FORMAT_RGB565, +#endif + .rotation = { + .swap_xy = false, + .mirror_x = false, + .mirror_y = false, + }, + .flags = { + .buff_dma = false, + .buff_spiram = false, + .sw_rotate = true, +#if LVGL_VERSION_MAJOR >= 9 + .swap_bytes = false, +#endif +#if LCD_LVGL_DIRECT_MODE + .direct_mode = true, +#endif + }, + }; + + const lvgl_port_display_rgb_cfg_t rgb_config = { + .flags = { + .bb_mode = true, +#if LCD_LVGL_AVOID_TEAR + .avoid_tearing = true, +#endif + }, + }; + + ESP_LOGI(TAG, "Add LVGL RGB display"); + lvgl_display = lvgl_port_add_disp_rgb(&display_config, &rgb_config); + ESP_RETURN_ON_FALSE(lvgl_display, ESP_FAIL, TAG, "LVGL display add failed"); + lv_display_set_rotation(lvgl_display, LCD_LVGL_ROTATION); + ESP_LOGI(TAG, "LVGL display rotation set to %d", LCD_LVGL_ROTATION); + + if (touch_handle) { + const lvgl_port_touch_cfg_t touch_config = { + .disp = lvgl_display, + .handle = touch_handle, + }; + lvgl_touch_indev = lvgl_port_add_touch(&touch_config); + ESP_RETURN_ON_FALSE(lvgl_touch_indev, ESP_FAIL, TAG, "LVGL touch add failed"); + ESP_LOGI(TAG, "LVGL touch input ready"); + } else { + ESP_LOGW(TAG, "LVGL touch input disabled"); + } + + ESP_LOGI(TAG, "LVGL ready"); + + return ESP_OK; +} + +esp_err_t lcd_init(void){ + ESP_RETURN_ON_ERROR(init_rgb_panel(), TAG, "LCD panel init failed"); + const esp_err_t touch_ret = init_touch(); + if (touch_ret != ESP_OK) { + ESP_LOGW(TAG, "Continuing without touch: %s", esp_err_to_name(touch_ret)); + } + return init_lvgl(); +} + +lv_display_t *lcd_get_display(void){ + return lvgl_display; +} diff --git a/main/lcd/lcd.h b/main/lcd/lcd.h new file mode 100644 index 0000000..f25debd --- /dev/null +++ b/main/lcd/lcd.h @@ -0,0 +1,18 @@ +#pragma once + +#include "esp_err.h" +#include "lvgl.h" + +#ifdef __cplusplus +extern "C" { +#endif + +#define LCD_H_RES (800) +#define LCD_V_RES (480) + +esp_err_t lcd_init(void); +lv_display_t *lcd_get_display(void); + +#ifdef __cplusplus +} +#endif \ No newline at end of file diff --git a/main/main.c b/main/main.c new file mode 100644 index 0000000..7930eb1 --- /dev/null +++ b/main/main.c @@ -0,0 +1,89 @@ +#include "esp_check.h" +#include "esp_log.h" +#include "esp_lvgl_port.h" +#include "lcd/lcd.h" +#include "sd/sd.h" +#include "lvgl.h" + +static const char *TAG = "app"; +static lv_obj_t *log_textarea = NULL; + +static void ui_log_append(const char *text) +{ + if(log_textarea == NULL || text == NULL) return; + + lvgl_port_lock(0); + lv_textarea_add_text(log_textarea, text); + lv_textarea_add_text(log_textarea, "\n"); + lv_textarea_set_cursor_pos(log_textarea, LV_TEXTAREA_CURSOR_LAST); + lvgl_port_unlock(); +} + +static void create_log_ui(void) +{ + lv_obj_t *screen = lv_screen_active(); + lv_obj_set_style_bg_color(screen, lv_color_hex(0x101418), 0); + + lv_obj_t *title = lv_label_create(screen); + lv_label_set_text(title, "SD Image Viewer"); + lv_obj_set_style_text_color(title, lv_color_white(), 0); + lv_obj_align(title, LV_ALIGN_TOP_MID, 0, 14); + + log_textarea = lv_textarea_create(screen); + lv_obj_set_size(log_textarea, lv_pct(92), lv_pct(84)); + lv_obj_align(log_textarea, LV_ALIGN_BOTTOM_MID, 0, -14); + lv_textarea_set_one_line(log_textarea, false); + lv_textarea_set_cursor_click_pos(log_textarea, false); + lv_textarea_set_text(log_textarea, ""); + lv_obj_set_style_bg_color(log_textarea, lv_color_hex(0x182028), 0); + lv_obj_set_style_text_color(log_textarea, lv_color_hex(0xdde7ef), 0); + lv_obj_set_style_border_color(log_textarea, lv_color_hex(0x4b6478), 0); + lv_obj_set_style_radius(log_textarea, 4, 0); + lv_obj_set_style_pad_all(log_textarea, 12, 0); + + lv_textarea_add_text(log_textarea, "Boot UI ready\n"); + lv_textarea_set_cursor_pos(log_textarea, LV_TEXTAREA_CURSOR_LAST); +} + +void app_main(void) +{ + ESP_LOGI(TAG, "Start display application"); + ESP_ERROR_CHECK(lcd_init()); + + ESP_LOGI(TAG, "Creating log UI"); + lvgl_port_lock(0); + create_log_ui(); + lvgl_port_unlock(); + + ESP_LOGI(TAG, "Initializing SD card"); + ui_log_append("Initializing SD card..."); + sd_init(); + print_sd_card_info(); + ui_log_append("SD initialization done"); + ESP_LOGI(TAG, "SD card initialization complete"); + + size_t file_count = sd_get_file_count(); + ESP_LOGI(TAG, "Found %d files in root directory", file_count); + const char* filename = NULL; + + while(file_count-- > 0 && (filename = sd_get_next_file()) != NULL){ + ESP_LOGI(TAG, "Found file: %s", filename); + char line[96]; + snprintf(line, sizeof(line), "Found file: %s", filename); + ui_log_append(line); + } + + /* + FILE* file = sd_open_write("test.txt"); + if(file != NULL){ + fprintf(file, "Hello, SD card!\n"); + sd_close_file(file); + ui_log_append("Wrote test.txt"); + } else { + ui_log_append("Failed to open test.txt for writing"); + } + */ + + sd_destroy(); + ui_log_append("SD card unmounted"); +} diff --git a/main/sd/sd.c b/main/sd/sd.c new file mode 100644 index 0000000..0414eef --- /dev/null +++ b/main/sd/sd.c @@ -0,0 +1,207 @@ +#include +#include +#include +#include +#include +#include + +#include "sd/sd.h" + +#include "esp_err.h" +#include "esp_log.h" +#include "esp_vfs_fat.h" +#include "sdmmc_cmd.h" +#include "driver/gpio.h" +#include "driver/sdspi_host.h" +#include "driver/spi_common.h" + +#define MAX_CHAR_SIZE 64 +#define MOUNT_POINT "/sdcard" + +#define SD_PIN_MOSI (GPIO_NUM_11) +#define SD_PIN_MISO (GPIO_NUM_13) +#define SD_PIN_CLK (GPIO_NUM_12) +#define SD_PIN_CS (GPIO_NUM_10) + +static sdmmc_card_t* card = NULL; +static const char *TAG = "sd"; + +static char** _file_list = NULL; +static size_t _current_file = 0; +static size_t _file_count = 0; + +static esp_err_t get_top_level_files(void); + +void sd_init(void){ + if(card != NULL){ + ESP_LOGW(TAG, "SD card already initialized"); + return; + } + + sdmmc_host_t host = SDSPI_HOST_DEFAULT(); + host.unaligned_multi_block_rw_max_chunk_size = 8; + + spi_bus_config_t bus_config = { + .mosi_io_num = SD_PIN_MOSI, + .miso_io_num = SD_PIN_MISO, + .sclk_io_num = SD_PIN_CLK, + .quadwp_io_num = GPIO_NUM_NC, + .quadhd_io_num = GPIO_NUM_NC, + .max_transfer_sz = 4000, + }; + + esp_err_t ret = spi_bus_initialize(host.slot, &bus_config, SDSPI_DEFAULT_DMA); + if(ret != ESP_OK){ + ESP_LOGE(TAG, "Failed to initialize SD SPI bus (%s)", esp_err_to_name(ret)); + return; + } + + sdspi_device_config_t slot_config = SDSPI_DEVICE_CONFIG_DEFAULT(); + slot_config.gpio_cs = SD_PIN_CS; + slot_config.host_id = host.slot; + + esp_vfs_fat_sdmmc_mount_config_t mount_config = { + .format_if_mount_failed = false, + .max_files = MAX_SIMULTANEOUS_OPEN_FILES, + .allocation_unit_size = 16 * 1024 + }; + + const char mount_point[] = MOUNT_POINT; + + ret = esp_vfs_fat_sdspi_mount(mount_point, &host, &slot_config, &mount_config, &card); + + if(ret != ESP_OK){ + if(ret == ESP_FAIL) ESP_LOGE(TAG, "Failed to mount filesystem."); + else ESP_LOGE(TAG, "Failed to initialize the card (%s). ", esp_err_to_name(ret)); + spi_bus_free(host.slot); + return; + } + + ESP_LOGI(TAG, "SD card initialized"); + + if(get_top_level_files() == ESP_OK) ESP_LOGI(TAG, "Found %d files in root directory", _file_count); + else ESP_LOGW(TAG, "No files found in root directory"); +} + +void print_sd_card_info(void){ + if(card == NULL) return; + sdmmc_card_print_info(stdout, card); +} + +static inline void make_file_path(char* buffer, size_t buffer_size, const char* filename){ + snprintf(buffer, buffer_size, "%s/%s", MOUNT_POINT, filename); +} + +FILE* sd_open_read(const char* filename){ + if(filename == NULL) return NULL; + char full_path[strlen(MOUNT_POINT) + strlen(filename) + 2]; + make_file_path(full_path, sizeof(full_path), filename); + return fopen(full_path, "r"); +} + +FILE* sd_open_write(const char* filename){ + if(filename == NULL) return NULL; + char full_path[strlen(MOUNT_POINT) + strlen(filename) + 2]; + make_file_path(full_path, sizeof(full_path), filename); + return fopen(full_path, "w"); +} + +void sd_close_file(FILE* file){ + if(file != NULL) fclose(file); +} + +static esp_err_t get_top_level_files(void){ + char** file_list = NULL; + size_t count = 0; + size_t capacity = 0; + + DIR* dir = opendir(MOUNT_POINT); + if(dir == NULL){ + ESP_LOGE(TAG, "Failed to open directory: %s", MOUNT_POINT); + return ESP_FAIL; + } + + struct dirent* entry; + while((entry = readdir(dir)) != NULL){ + if(entry->d_type == DT_REG){ + ESP_LOGI(TAG, "Found file: %s", entry->d_name); + + size_t name_length = strlen(entry->d_name); + if(name_length >= MAX_CHAR_SIZE){ + ESP_LOGW(TAG, "File name too long: %s", entry->d_name); + continue; + } + + if(count == capacity){ + size_t new_capacity = capacity == 0 ? 8 : capacity * 2; + char** new_file_list = (char**)realloc(file_list, sizeof(char*) * new_capacity); + if(new_file_list == NULL){ + ESP_LOGE(TAG, "Failed to allocate memory for file list"); + for(size_t j = 0; j < count; j++) free(file_list[j]); + free(file_list); + closedir(dir); + return ESP_FAIL; + } + file_list = new_file_list; + capacity = new_capacity; + } + + file_list[count] = (char*)malloc(sizeof(char) * (name_length + 1)); + if(file_list[count] == NULL){ + ESP_LOGE(TAG, "Failed to allocate memory for file name"); + for(size_t j = 0; j < count; j++) free(file_list[j]); + free(file_list); + closedir(dir); + return ESP_FAIL; + } + + memcpy(file_list[count], entry->d_name, name_length + 1); + count++; + } + } + closedir(dir); + + if(count == 0){ + ESP_LOGW(TAG, "No files found in directory: %s", MOUNT_POINT); + free(file_list); + _file_list = NULL; + _current_file = 0; + return ESP_FAIL; + } + + _file_list = file_list; + _file_count = count; + + return ESP_OK; +} + +size_t sd_get_file_count(void){ + return _file_count; +} + +const char* sd_get_next_file(void){ + if(_current_file >= _file_count) _current_file = 0; + return _file_list[_current_file++]; +} + +const char* sd_get_previous_file(void){ + if(_current_file == 0) _current_file = _file_count; + return _file_list[--_current_file]; +} + +void sd_destroy(void){ + if(card != NULL){ + esp_vfs_fat_sdcard_unmount(MOUNT_POINT, card); + card = NULL; + ESP_LOGI(TAG, "SD card unmounted"); + } + + if(_file_list != NULL){ + for(int i = 0; i < _file_count; i++) free((void*)_file_list[i]); + free((void*)_file_list); + _file_list = NULL; + } + + _file_count = 0; + _current_file = 0; +} \ No newline at end of file diff --git a/main/sd/sd.h b/main/sd/sd.h new file mode 100644 index 0000000..39e9c30 --- /dev/null +++ b/main/sd/sd.h @@ -0,0 +1,18 @@ +#pragma once + +#include + +#define MAX_SIMULTANEOUS_OPEN_FILES 2 + +void sd_init(void); +void sd_destroy(void); + +void print_sd_card_info(void); + +FILE* sd_open_read(const char* filename); +FILE* sd_open_write(const char* filename); +void sd_close_file(FILE* file); + +size_t sd_get_file_count(void); +const char* sd_get_next_file(void); +const char* sd_get_previous_file(void); diff --git a/sdkconfig b/sdkconfig new file mode 100644 index 0000000..eed8e65 --- /dev/null +++ b/sdkconfig @@ -0,0 +1,3501 @@ +# +# Automatically generated file. DO NOT EDIT. +# Espressif IoT Development Framework (ESP-IDF) 6.0.2 Project Configuration +# +# default: +CONFIG_SOC_ADC_SUPPORTED=y +# default: +CONFIG_SOC_UART_SUPPORTED=y +# default: +CONFIG_SOC_PCNT_SUPPORTED=y +# default: +CONFIG_SOC_PHY_SUPPORTED=y +# default: +CONFIG_SOC_WIFI_SUPPORTED=y +# default: +CONFIG_SOC_TWAI_SUPPORTED=y +# default: +CONFIG_SOC_GDMA_SUPPORTED=y +# default: +CONFIG_SOC_UHCI_SUPPORTED=y +# default: +CONFIG_SOC_AHB_GDMA_SUPPORTED=y +# default: +CONFIG_SOC_GPTIMER_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_CAM_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_I80_LCD_SUPPORTED=y +# default: +CONFIG_SOC_LCDCAM_RGB_LCD_SUPPORTED=y +# default: +CONFIG_SOC_LCD_I80_SUPPORTED=y +# default: +CONFIG_SOC_LCD_RGB_SUPPORTED=y +# default: +CONFIG_SOC_MCPWM_SUPPORTED=y +# default: +CONFIG_SOC_DEDICATED_GPIO_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_SUPPORT_WRAP=y +# default: +CONFIG_SOC_ULP_SUPPORTED=y +# default: +CONFIG_SOC_ULP_FSM_SUPPORTED=y +# default: +CONFIG_SOC_RISCV_COPROC_SUPPORTED=y +# default: +CONFIG_SOC_BT_SUPPORTED=y +# default: +CONFIG_SOC_USB_OTG_SUPPORTED=y +# default: +CONFIG_SOC_USB_SERIAL_JTAG_SUPPORTED=y +# default: +CONFIG_SOC_CCOMP_TIMER_SUPPORTED=y +# default: +CONFIG_SOC_ASYNC_MEMCPY_SUPPORTED=y +# default: +CONFIG_SOC_SUPPORTS_SECURE_DL_MODE=y +# default: +CONFIG_SOC_EFUSE_KEY_PURPOSE_FIELD=y +# default: +CONFIG_SOC_EFUSE_SUPPORTED=y +# default: +CONFIG_SOC_SDMMC_HOST_SUPPORTED=y +# default: +CONFIG_SOC_RTC_FAST_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_SLOW_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_MEM_SUPPORTED=y +# default: +CONFIG_SOC_RTC_TIMER_V1_SUPPORTED=y +# default: +CONFIG_SOC_PSRAM_DMA_CAPABLE=y +# default: +CONFIG_SOC_XT_WDT_SUPPORTED=y +# default: +CONFIG_SOC_I2S_SUPPORTED=y +# default: +CONFIG_SOC_RMT_SUPPORTED=y +# default: +CONFIG_SOC_SDM_SUPPORTED=y +# default: +CONFIG_SOC_GPSPI_SUPPORTED=y +# default: +CONFIG_SOC_LEDC_SUPPORTED=y +# default: +CONFIG_SOC_I2C_SUPPORTED=y +# default: +CONFIG_SOC_SYSTIMER_SUPPORTED=y +# default: +CONFIG_SOC_SUPPORT_COEXISTENCE=y +# default: +CONFIG_SOC_TEMP_SENSOR_SUPPORTED=y +# default: +CONFIG_SOC_AES_SUPPORTED=y +# default: +CONFIG_SOC_MPI_SUPPORTED=y +# default: +CONFIG_SOC_SHA_SUPPORTED=y +# default: +CONFIG_SOC_HMAC_SUPPORTED=y +# default: +CONFIG_SOC_DIG_SIGN_SUPPORTED=y +# default: +CONFIG_SOC_FLASH_ENC_SUPPORTED=y +# default: +CONFIG_SOC_SECURE_BOOT_SUPPORTED=y +# default: +CONFIG_SOC_MEMPROT_SUPPORTED=y +# default: +CONFIG_SOC_TOUCH_SENSOR_SUPPORTED=y +# default: +CONFIG_SOC_BOD_SUPPORTED=y +# default: +CONFIG_SOC_CLK_TREE_SUPPORTED=y +# default: +CONFIG_SOC_MPU_SUPPORTED=y +# default: +CONFIG_SOC_WDT_SUPPORTED=y +# default: +CONFIG_SOC_SPI_FLASH_SUPPORTED=y +# default: +CONFIG_SOC_RNG_SUPPORTED=y +# default: +CONFIG_SOC_LIGHT_SLEEP_SUPPORTED=y +# default: +CONFIG_SOC_DEEP_SLEEP_SUPPORTED=y +# default: +CONFIG_SOC_LP_PERIPH_SHARE_INTERRUPT=y +# default: +CONFIG_SOC_PM_SUPPORTED=y +# default: +CONFIG_SOC_SIMD_INSTRUCTION_SUPPORTED=y +# default: +CONFIG_SOC_XTAL_SUPPORT_40M=y +# default: +CONFIG_SOC_APPCPU_HAS_CLOCK_GATING_BUG=y +# default: +CONFIG_SOC_ADC_RTC_CTRL_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DIG_CTRL_SUPPORTED=y +# default: +CONFIG_SOC_ADC_ARBITER_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DIG_IIR_FILTER_SUPPORTED=y +# default: +CONFIG_SOC_ADC_MONITOR_SUPPORTED=y +# default: +CONFIG_SOC_ADC_DMA_SUPPORTED=y +# default: +CONFIG_SOC_ADC_PERIPH_NUM=2 +# default: +CONFIG_SOC_ADC_MAX_CHANNEL_NUM=10 +# default: +CONFIG_SOC_ADC_ATTEN_NUM=4 +# default: +CONFIG_SOC_ADC_DIGI_CONTROLLER_NUM=2 +# default: +CONFIG_SOC_ADC_PATT_LEN_MAX=24 +# default: +CONFIG_SOC_ADC_DIGI_MIN_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_DIGI_MAX_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_DIGI_RESULT_BYTES=4 +# default: +CONFIG_SOC_ADC_DIGI_DATA_BYTES_PER_CONV=4 +# default: +CONFIG_SOC_ADC_DIGI_IIR_FILTER_NUM=2 +# default: +CONFIG_SOC_ADC_DIGI_MONITOR_NUM=2 +# default: +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_HIGH=83333 +# default: +CONFIG_SOC_ADC_SAMPLE_FREQ_THRES_LOW=611 +# default: +CONFIG_SOC_ADC_RTC_MIN_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_RTC_MAX_BITWIDTH=12 +# default: +CONFIG_SOC_ADC_CALIBRATION_V1_SUPPORTED=y +# default: +CONFIG_SOC_ADC_SELF_HW_CALI_SUPPORTED=y +# default: +CONFIG_SOC_ADC_SHARED_POWER=y +# default: +CONFIG_SOC_APB_BACKUP_DMA=y +# default: +CONFIG_SOC_BROWNOUT_RESET_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_WRITEBACK_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_FREEZE_SUPPORTED=y +# default: +CONFIG_SOC_CACHE_ACS_INVALID_STATE_ON_PANIC=y +# default: +CONFIG_SOC_CPU_CORES_NUM=2 +# default: +CONFIG_SOC_CPU_INTR_NUM=32 +# default: +CONFIG_SOC_CPU_HAS_FPU=y +# default: +CONFIG_SOC_HP_CPU_HAS_MULTIPLE_CORES=y +# default: +CONFIG_SOC_CPU_BREAKPOINTS_NUM=2 +# default: +CONFIG_SOC_CPU_WATCHPOINTS_NUM=2 +# default: +CONFIG_SOC_CPU_WATCHPOINT_MAX_REGION_SIZE=0x40 +# default: +CONFIG_SOC_SIMD_PREFERRED_DATA_ALIGNMENT=16 +# default: +CONFIG_SOC_DS_SIGNATURE_MAX_BIT_LEN=4096 +# default: +CONFIG_SOC_DS_KEY_PARAM_MD_IV_LENGTH=16 +# default: +CONFIG_SOC_DS_KEY_CHECK_MAX_WAIT_US=1100 +# default: +CONFIG_SOC_AHB_GDMA_VERSION=1 +# default: +CONFIG_SOC_GPIO_PORT=1 +# default: +CONFIG_SOC_GPIO_PIN_COUNT=49 +# default: +CONFIG_SOC_GPIO_SUPPORT_PIN_GLITCH_FILTER=y +# default: +CONFIG_SOC_GPIO_SUPPORT_FORCE_HOLD=y +# default: +CONFIG_SOC_GPIO_VALID_GPIO_MASK=0x1FFFFFFFFFFFF +# default: +CONFIG_SOC_GPIO_IN_RANGE_MAX=48 +# default: +CONFIG_SOC_GPIO_OUT_RANGE_MAX=48 +# default: +CONFIG_SOC_GPIO_VALID_DIGITAL_IO_PAD_MASK=0x0001FFFFFC000000 +# default: +CONFIG_SOC_GPIO_CLOCKOUT_BY_IO_MUX=y +# default: +CONFIG_SOC_GPIO_CLOCKOUT_CHANNEL_NUM=3 +# default: +CONFIG_SOC_I2C_NUM=2 +# default: +CONFIG_SOC_HP_I2C_NUM=2 +# default: +CONFIG_SOC_I2C_SUPPORT_XTAL=y +# default: +CONFIG_SOC_I2C_SUPPORT_RTC=y +# default: +CONFIG_SOC_I2C_SUPPORT_10BIT_ADDR=y +# default: +CONFIG_SOC_I2C_SUPPORT_SLAVE=y +# default: +CONFIG_SOC_I2C_SLAVE_SUPPORT_BROADCAST=y +# default: +CONFIG_SOC_I2C_SLAVE_CAN_GET_STRETCH_CAUSE=y +# default: +CONFIG_SOC_I2S_HW_VERSION_2=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PCM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM_TX=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PCM2PDM=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM_RX=y +# default: +CONFIG_SOC_I2S_SUPPORTS_PDM2PCM=y +# default: +CONFIG_SOC_I2S_PDM_MAX_TX_LINES=2 +# default: +CONFIG_SOC_I2S_PDM_MAX_RX_LINES=4 +# default: +CONFIG_SOC_I2S_SUPPORTS_TDM=y +# default: +CONFIG_SOC_LEDC_SUPPORT_APB_CLOCK=y +# default: +CONFIG_SOC_LEDC_SUPPORT_XTAL_CLOCK=y +# default: +CONFIG_SOC_LEDC_TIMER_NUM=4 +# default: +CONFIG_SOC_LEDC_CHANNEL_NUM=8 +# default: +CONFIG_SOC_LEDC_TIMER_BIT_WIDTH=14 +# default: +CONFIG_SOC_LEDC_SUPPORT_FADE_STOP=y +# default: +CONFIG_SOC_MCPWM_SWSYNC_CAN_PROPAGATE=y +# default: +CONFIG_SOC_MMU_LINEAR_ADDRESS_REGION_NUM=1 +# default: +CONFIG_SOC_MMU_PERIPH_NUM=1 +# default: +CONFIG_SOC_MPU_MIN_REGION_SIZE=0x20000000 +# default: +CONFIG_SOC_MPU_REGIONS_MAX_NUM=8 +# default: +CONFIG_SOC_RMT_MEM_WORDS_PER_CHANNEL=48 +# default: +CONFIG_SOC_RMT_SUPPORT_RX_PINGPONG=y +# default: +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_COUNT=y +# default: +CONFIG_SOC_RMT_SUPPORT_TX_LOOP_AUTO_STOP=y +# default: +CONFIG_SOC_RMT_SUPPORT_DMA=y +# default: +CONFIG_SOC_RTC_CNTL_CPU_PD_DMA_BUS_WIDTH=128 +# default: +CONFIG_SOC_RTC_CNTL_CPU_PD_REG_FILE_NUM=549 +# default: +CONFIG_SOC_RTC_CNTL_TAGMEM_PD_DMA_BUS_WIDTH=128 +# default: +CONFIG_SOC_RTC_CNTL_NEEDS_ATOMIC_ACCESS=y +# default: +CONFIG_SOC_RTCIO_PIN_COUNT=22 +# default: +CONFIG_SOC_RTCIO_INPUT_OUTPUT_SUPPORTED=y +# default: +CONFIG_SOC_RTCIO_HOLD_SUPPORTED=y +# default: +CONFIG_SOC_RTCIO_WAKE_SUPPORTED=y +# default: +CONFIG_SOC_LP_IO_CLOCK_IS_INDEPENDENT=y +# default: +CONFIG_SOC_SPI_PERIPH_NUM=3 +# default: +CONFIG_SOC_SPI_MAX_CS_NUM=6 +# default: +CONFIG_SOC_SPI_MAXIMUM_BUFFER_SIZE=64 +# default: +CONFIG_SOC_SPI_SUPPORT_DDRCLK=y +# default: +CONFIG_SOC_SPI_SLAVE_SUPPORT_SEG_TRANS=y +# default: +CONFIG_SOC_SPI_SUPPORT_CD_SIG=y +# default: +CONFIG_SOC_SPI_SUPPORT_CONTINUOUS_TRANS=y +# default: +CONFIG_SOC_SPI_SUPPORT_SLAVE_HD_VER2=y +# default: +CONFIG_SOC_SPI_SUPPORT_CLK_APB=y +# default: +CONFIG_SOC_SPI_SUPPORT_CLK_XTAL=y +# default: +CONFIG_SOC_SPI_PERIPH_SUPPORT_CONTROL_DUMMY_OUT=y +# default: +CONFIG_SOC_MEMSPI_IS_INDEPENDENT=y +# default: +CONFIG_SOC_SPI_MAX_PRE_DIVIDER=16 +# default: +CONFIG_SOC_SPI_SUPPORT_OCT=y +# default: +CONFIG_SOC_SPI_SCT_SUPPORTED=y +# default: +CONFIG_SOC_SPI_SCT_REG_NUM=14 +# default: +CONFIG_SOC_SPI_SCT_BUFFER_NUM_MAX=y +# default: +CONFIG_SOC_SPI_SCT_CONF_BITLEN_MAX=0x3FFFA +# default: +CONFIG_SOC_SPIRAM_SUPPORTED=y +# default: +CONFIG_SOC_SPIRAM_XIP_SUPPORTED=y +# default: +CONFIG_SOC_SYSTIMER_COUNTER_NUM=2 +# default: +CONFIG_SOC_SYSTIMER_ALARM_NUM=3 +# default: +CONFIG_SOC_SYSTIMER_BIT_WIDTH_LO=32 +# default: +CONFIG_SOC_SYSTIMER_BIT_WIDTH_HI=20 +# default: +CONFIG_SOC_SYSTIMER_FIXED_DIVIDER=y +# default: +CONFIG_SOC_SYSTIMER_INT_LEVEL=y +# default: +CONFIG_SOC_SYSTIMER_ALARM_MISS_COMPENSATE=y +# default: +CONFIG_SOC_LP_TIMER_BIT_WIDTH_LO=32 +# default: +CONFIG_SOC_LP_TIMER_BIT_WIDTH_HI=16 +# default: +CONFIG_SOC_TOUCH_SENSOR_VERSION=2 +# default: +CONFIG_SOC_TOUCH_MIN_CHAN_ID=1 +# default: +CONFIG_SOC_TOUCH_MAX_CHAN_ID=14 +# default: +CONFIG_SOC_TOUCH_SUPPORT_BENCHMARK=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_SLEEP_WAKEUP=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_WATERPROOF=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_PROX_SENSING=y +# default: +CONFIG_SOC_TOUCH_SUPPORT_DENOISE_CHAN=y +# default: +CONFIG_SOC_TOUCH_PROXIMITY_CHANNEL_NUM=3 +# default: +CONFIG_SOC_TOUCH_SAMPLE_CFG_NUM=1 +# default: +CONFIG_SOC_TWAI_CONTROLLER_NUM=1 +# default: +CONFIG_SOC_TWAI_MASK_FILTER_NUM=1 +# default: +CONFIG_SOC_UART_NUM=3 +# default: +CONFIG_SOC_UART_HP_NUM=3 +# default: +CONFIG_SOC_UART_FIFO_LEN=128 +# default: +CONFIG_SOC_UART_BITRATE_MAX=5000000 +# default: +CONFIG_SOC_UART_SUPPORT_WAKEUP_INT=y +# default: +CONFIG_SOC_UART_SUPPORT_APB_CLK=y +# default: +CONFIG_SOC_UART_SUPPORT_RTC_CLK=y +# default: +CONFIG_SOC_UART_SUPPORT_XTAL_CLK=y +# default: +CONFIG_SOC_UART_WAKEUP_SUPPORT_ACTIVE_THRESH_MODE=y +# default: +CONFIG_SOC_UHCI_NUM=1 +# default: +CONFIG_SOC_USB_OTG_PERIPH_NUM=1 +# default: +CONFIG_SOC_USB_FSLS_PHY_NUM=1 +# default: +CONFIG_SOC_SHA_DMA_MAX_BUFFER_SIZE=3968 +# default: +CONFIG_SOC_SHA_SUPPORT_DMA=y +# default: +CONFIG_SOC_SHA_SUPPORT_RESUME=y +# default: +CONFIG_SOC_SHA_GDMA=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA1=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA224=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA256=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA384=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_224=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_256=y +# default: +CONFIG_SOC_SHA_SUPPORT_SHA512_T=y +# default: +CONFIG_SOC_MPI_MEM_BLOCKS_NUM=4 +# default: +CONFIG_SOC_MPI_OPERATIONS_NUM=3 +# default: +CONFIG_SOC_RSA_MAX_BIT_LEN=4096 +# default: +CONFIG_SOC_AES_SUPPORT_DMA=y +# default: +CONFIG_SOC_AES_GDMA=y +# default: +CONFIG_SOC_AES_SUPPORT_AES_128=y +# default: +CONFIG_SOC_AES_SUPPORT_AES_256=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT0_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT1_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_EXT_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_WIFI_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_BT_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_TOUCH_SENSOR_WAKEUP=y +# default: +CONFIG_SOC_PM_SUPPORT_CPU_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_TAGMEM_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_RTC_PERIPH_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_RC_FAST_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_VDDSDIO_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_MAC_BB_PD=y +# default: +CONFIG_SOC_PM_SUPPORT_MODEM_PD=y +# default: +CONFIG_SOC_CONFIGURABLE_VDDSDIO_SUPPORTED=y +# default: +CONFIG_SOC_PM_SUPPORT_DEEPSLEEP_CHECK_STUB_ONLY=y +# default: +CONFIG_SOC_PM_CPU_RETENTION_BY_RTCCNTL=y +# default: +CONFIG_SOC_PM_MODEM_RETENTION_BY_BACKUPDMA=y +# default: +CONFIG_SOC_PM_MODEM_PD_BY_SW=y +# default: +CONFIG_SOC_CLK_RC_FAST_D256_SUPPORTED=y +# default: +CONFIG_SOC_RTC_SLOW_CLK_SUPPORT_RC_FAST_D256=y +# default: +CONFIG_SOC_CLK_RC_FAST_SUPPORT_CALIBRATION=y +# default: +CONFIG_SOC_CLK_XTAL32K_SUPPORTED=y +# default: +CONFIG_SOC_CLK_LP_FAST_SUPPORT_XTAL_D2=y +# default: +CONFIG_SOC_EFUSE_DIS_DOWNLOAD_ICACHE=y +# default: +CONFIG_SOC_EFUSE_DIS_DOWNLOAD_DCACHE=y +# default: +CONFIG_SOC_EFUSE_HARD_DIS_JTAG=y +# default: +CONFIG_SOC_EFUSE_DIS_USB_JTAG=y +# default: +CONFIG_SOC_EFUSE_SOFT_DIS_JTAG=y +# default: +CONFIG_SOC_EFUSE_DIS_DIRECT_BOOT=y +# default: +CONFIG_SOC_EFUSE_DIS_ICACHE=y +# default: +CONFIG_SOC_EFUSE_BLOCK9_KEY_PURPOSE_QUIRK=y +# default: +CONFIG_SOC_EFUSE_XTS_AES_KEY_128=y +# default: +CONFIG_SOC_EFUSE_XTS_AES_KEY_256=y +# default: +CONFIG_SOC_SECURE_BOOT_V2_RSA=y +# default: +CONFIG_SOC_EFUSE_SECURE_BOOT_KEY_DIGESTS=3 +# default: +CONFIG_SOC_EFUSE_REVOKE_BOOT_KEY_DIGESTS=y +# default: +CONFIG_SOC_SUPPORT_SECURE_BOOT_REVOKE_KEY=y +# default: +CONFIG_SOC_FLASH_ENCRYPTED_XTS_AES_BLOCK_MAX=64 +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_OPTIONS=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_128=y +# default: +CONFIG_SOC_FLASH_ENCRYPTION_XTS_AES_256=y +# default: +CONFIG_SOC_MEMPROT_CPU_PREFETCH_PAD_SIZE=16 +# default: +CONFIG_SOC_MEMPROT_MEM_ALIGN_SIZE=256 +# default: +CONFIG_SOC_PHY_DIG_REGS_MEM_SIZE=21 +# default: +CONFIG_SOC_MAC_BB_PD_MEM_SIZE=192 +# default: +CONFIG_SOC_WIFI_LIGHT_SLEEP_CLK_WIDTH=12 +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_WAIT_IDLE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_SUSPEND=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_AUTO_RESUME=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_SW_SUSPEND=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_FLASH_OPI_MODE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_TIMING_TUNING=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_CONFIG_GPIO_BY_EFUSE=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_WRAP=y +# default: +CONFIG_SOC_MEMSPI_TIMING_TUNING_BY_MSPI_DELAY=y +# default: +CONFIG_SOC_MEMSPI_CORE_CLK_SHARED_WITH_PSRAM=y +# default: +CONFIG_SOC_SPI_MEM_SUPPORT_CACHE_32BIT_ADDR_MAP=y +# default: +CONFIG_SOC_SPI_MEM_FLASH_SUPPORT_HPM=y +# default: +CONFIG_SOC_MEMSPI_ENCRYPTION_ALIGNMENT=16 +# default: +CONFIG_SOC_COEX_HW_PTI=y +# default: +CONFIG_SOC_EXTERNAL_COEX_LEADER_TX_LINE=y +# default: +CONFIG_SOC_SDMMC_USE_GPIO_MATRIX=y +# default: +CONFIG_SOC_SDMMC_NUM_SLOTS=2 +# default: +CONFIG_SOC_SDMMC_DATA_WIDTH_MAX=8 +# default: +CONFIG_SOC_SDMMC_DELAY_PHASE_NUM=4 +# default: +CONFIG_SOC_TEMPERATURE_SENSOR_SUPPORT_FAST_RC=y +# default: +CONFIG_SOC_WIFI_HW_TSF=y +# default: +CONFIG_SOC_WIFI_FTM_SUPPORT=y +# default: +CONFIG_SOC_WIFI_GCMP_SUPPORT=y +# default: +CONFIG_SOC_WIFI_WAPI_SUPPORT=y +# default: +CONFIG_SOC_WIFI_TXOP_SUPPORT=y +# default: +CONFIG_SOC_WIFI_CSI_SUPPORT=y +# default: +CONFIG_SOC_WIFI_MESH_SUPPORT=y +# default: +CONFIG_SOC_WIFI_SUPPORT_VARIABLE_BEACON_WINDOW=y +# default: +CONFIG_SOC_WIFI_PHY_NEEDS_USB_WORKAROUND=y +# default: +CONFIG_SOC_BLE_SUPPORTED=y +# default: +CONFIG_SOC_BLE_MESH_SUPPORTED=y +# default: +CONFIG_SOC_BLE_50_SUPPORTED=y +# default: +CONFIG_SOC_BLE_DEVICE_PRIVACY_SUPPORTED=y +# default: +CONFIG_SOC_BLUFI_SUPPORTED=y +# default: +CONFIG_SOC_ULP_HAS_ADC=y +# default: +CONFIG_SOC_PHY_COMBO_MODULE=y +# default: +CONFIG_SOC_LCDCAM_CAM_SUPPORT_RGB_YUV_CONV=y +# default: +CONFIG_IDF_CMAKE=y +# default: +CONFIG_IDF_TOOLCHAIN="gcc" +# default: +CONFIG_IDF_TOOLCHAIN_GCC=y +# default: +CONFIG_IDF_TARGET_ARCH_XTENSA=y +# default: +CONFIG_IDF_TARGET_ARCH="xtensa" +# default: +CONFIG_IDF_TARGET="esp32s3" +# default: +CONFIG_IDF_INIT_VERSION="6.0.2" +# default: +CONFIG_IDF_TARGET_ESP32S3=y +# default: +CONFIG_IDF_FIRMWARE_CHIP_ID=0x0009 + +# +# Build type +# +# default: +CONFIG_APP_BUILD_TYPE_APP_2NDBOOT=y +# default: +# CONFIG_APP_BUILD_TYPE_RAM is not set +# default: +CONFIG_APP_BUILD_GENERATE_BINARIES=y +# default: +CONFIG_APP_BUILD_BOOTLOADER=y +# default: +CONFIG_APP_BUILD_USE_FLASH_SECTIONS=y +# default: +# CONFIG_APP_REPRODUCIBLE_BUILD is not set +# default: +# CONFIG_APP_NO_BLOBS is not set +# end of Build type + +# +# App Update config +# +# end of App Update config + +# +# Bootloader config +# + +# +# Bootloader manager +# +# default: +CONFIG_BOOTLOADER_COMPILE_TIME_DATE=y +# default: +CONFIG_BOOTLOADER_PROJECT_VER=1 +# end of Bootloader manager + +# +# Application Rollback +# +# default: +# CONFIG_BOOTLOADER_APP_ROLLBACK_ENABLE is not set +# end of Application Rollback + +# +# Recovery Bootloader and Rollback +# +# end of Recovery Bootloader and Rollback + +# default: +CONFIG_BOOTLOADER_OFFSET_IN_FLASH=0x0 +# default: +CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_SIZE=y +# default: +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_DEBUG is not set +# default: +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_PERF is not set + +# +# Log +# +# default: +CONFIG_BOOTLOADER_LOG_VERSION_1=y +# default: +CONFIG_BOOTLOADER_LOG_VERSION=1 +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_NONE is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_ERROR is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_WARN is not set +# default: +CONFIG_BOOTLOADER_LOG_LEVEL_INFO=y +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_DEBUG is not set +# default: +# CONFIG_BOOTLOADER_LOG_LEVEL_VERBOSE is not set +# default: +CONFIG_BOOTLOADER_LOG_LEVEL=3 + +# +# Format +# +# default: +# CONFIG_BOOTLOADER_LOG_COLORS is not set +# default: +CONFIG_BOOTLOADER_LOG_TIMESTAMP_SOURCE_CPU_TICKS=y +# end of Format + +# +# Settings +# +# default: +CONFIG_BOOTLOADER_LOG_MODE_TEXT_EN=y +# default: +CONFIG_BOOTLOADER_LOG_MODE_TEXT=y +# end of Settings +# end of Log + +# default: +CONFIG_BOOTLOADER_CPU_CLK_FREQ_MHZ=80 + +# +# Serial Flash Configurations +# +# default: +# CONFIG_BOOTLOADER_FLASH_DC_AWARE is not set +# default: +CONFIG_BOOTLOADER_FLASH_XMC_SUPPORT=y +# end of Serial Flash Configurations + +# default: +CONFIG_BOOTLOADER_VDDSDIO_BOOST_1_9V=y +# default: +# CONFIG_BOOTLOADER_FACTORY_RESET is not set +# default: +# CONFIG_BOOTLOADER_APP_TEST is not set +# default: +CONFIG_BOOTLOADER_REGION_PROTECTION_ENABLE=y +# default: +CONFIG_BOOTLOADER_WDT_ENABLE=y +# default: +# CONFIG_BOOTLOADER_WDT_DISABLE_IN_USER_CODE is not set +# default: +CONFIG_BOOTLOADER_WDT_TIME_MS=9000 +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_IN_DEEP_SLEEP is not set +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ON_POWER_ON is not set +# default: +# CONFIG_BOOTLOADER_SKIP_VALIDATE_ALWAYS is not set +# default: +CONFIG_BOOTLOADER_RESERVE_RTC_SIZE=0 +# default: +# CONFIG_BOOTLOADER_CUSTOM_RESERVE_RTC is not set +# end of Bootloader config + +# +# Security features +# +# default: +CONFIG_SECURE_BOOT_V2_RSA_SUPPORTED=y +# default: +CONFIG_SECURE_BOOT_V2_PREFERRED=y +# default: +# CONFIG_SECURE_SIGNED_APPS_NO_SECURE_BOOT is not set +# default: +# CONFIG_SECURE_BOOT is not set +# default: +# CONFIG_SECURE_FLASH_ENC_ENABLED is not set +# default: +CONFIG_SECURE_ROM_DL_MODE_ENABLED=y +# end of Security features + +# +# Application manager +# +# default: +CONFIG_APP_COMPILE_TIME_DATE=y +# default: +# CONFIG_APP_EXCLUDE_PROJECT_VER_VAR is not set +# default: +# CONFIG_APP_EXCLUDE_PROJECT_NAME_VAR is not set +# default: +# CONFIG_APP_PROJECT_VER_FROM_CONFIG is not set +# default: +CONFIG_APP_RETRIEVE_LEN_ELF_SHA=9 +# end of Application manager + +# default: +CONFIG_ESP_ROM_HAS_CRC_LE=y +# default: +CONFIG_ESP_ROM_HAS_CRC_BE=y +# default: +CONFIG_ESP_ROM_HAS_MZ_CRC32=y +# default: +CONFIG_ESP_ROM_HAS_JPEG_DECODE=y +# default: +CONFIG_ESP_ROM_UART_CLK_IS_XTAL=y +# default: +CONFIG_ESP_ROM_HAS_RETARGETABLE_LOCKING=y +# default: +CONFIG_ESP_ROM_USB_OTG_NUM=3 +# default: +CONFIG_ESP_ROM_USB_SERIAL_DEVICE_NUM=4 +# default: +CONFIG_ESP_ROM_HAS_ERASE_0_REGION_BUG=y +# default: +CONFIG_ESP_ROM_HAS_ENCRYPTED_WRITES_USING_LEGACY_DRV=y +# default: +CONFIG_ESP_ROM_GET_CLK_FREQ=y +# default: +CONFIG_ESP_ROM_HAS_HAL_WDT=y +# default: +CONFIG_ESP_ROM_NEEDS_SWSETUP_WORKAROUND=y +# default: +CONFIG_ESP_ROM_HAS_LAYOUT_TABLE=y +# default: +CONFIG_ESP_ROM_HAS_SPI_FLASH=y +# default: +CONFIG_ESP_ROM_HAS_SPI_FLASH_MMAP=y +# default: +CONFIG_ESP_ROM_HAS_ETS_PRINTF_BUG=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB_NANO_FORMAT=y +# default: +CONFIG_ESP_ROM_HAS_NEWLIB_32BIT_TIME=y +# default: +CONFIG_ESP_ROM_NEEDS_SET_CACHE_MMU_SIZE=y +# default: +CONFIG_ESP_ROM_RAM_APP_NEEDS_MMU_INIT=y +# default: +CONFIG_ESP_ROM_HAS_FLASH_COUNT_PAGES_BUG=y +# default: +CONFIG_ESP_ROM_HAS_CACHE_SUSPEND_WAITI_BUG=y +# default: +CONFIG_ESP_ROM_HAS_CACHE_WRITEBACK_BUG=y +# default: +CONFIG_ESP_ROM_HAS_SW_FLOAT=y +# default: +CONFIG_ESP_ROM_HAS_VERSION=y +# default: +CONFIG_ESP_ROM_SUPPORT_DEEP_SLEEP_WAKEUP_STUB=y +# default: +CONFIG_ESP_ROM_HAS_OUTPUT_PUTC_FUNC=y +# default: +CONFIG_ESP_ROM_CONSOLE_OUTPUT_SECONDARY=y + +# +# Boot ROM Behavior +# +# default: +CONFIG_BOOT_ROM_LOG_ALWAYS_ON=y +# default: +# CONFIG_BOOT_ROM_LOG_ALWAYS_OFF is not set +# default: +# CONFIG_BOOT_ROM_LOG_ON_GPIO_HIGH is not set +# default: +# CONFIG_BOOT_ROM_LOG_ON_GPIO_LOW is not set +# end of Boot ROM Behavior + +# +# Serial flasher config +# +# default: +# CONFIG_ESPTOOLPY_NO_STUB is not set +# default: +# CONFIG_ESPTOOLPY_OCT_FLASH is not set +# default: +CONFIG_ESPTOOLPY_FLASH_MODE_AUTO_DETECT=y +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_QIO is not set +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_QOUT is not set +# default: +CONFIG_ESPTOOLPY_FLASHMODE_DIO=y +# default: +# CONFIG_ESPTOOLPY_FLASHMODE_DOUT is not set +# default: +CONFIG_ESPTOOLPY_FLASH_SAMPLE_MODE_STR=y +# default: +CONFIG_ESPTOOLPY_FLASHMODE="dio" +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_120M is not set +# default: +CONFIG_ESPTOOLPY_FLASHFREQ_80M=y +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_40M is not set +# default: +# CONFIG_ESPTOOLPY_FLASHFREQ_20M is not set +# default: +CONFIG_ESPTOOLPY_FLASHFREQ="80m" +# CONFIG_ESPTOOLPY_FLASHSIZE_1MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_2MB is not set +CONFIG_ESPTOOLPY_FLASHSIZE_4MB=y +# CONFIG_ESPTOOLPY_FLASHSIZE_8MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_16MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_32MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_64MB is not set +# CONFIG_ESPTOOLPY_FLASHSIZE_128MB is not set +# default: +CONFIG_ESPTOOLPY_FLASHSIZE="4MB" +# default: +# CONFIG_ESPTOOLPY_HEADER_FLASHSIZE_UPDATE is not set +# default: +CONFIG_ESPTOOLPY_BEFORE_RESET=y +# default: +# CONFIG_ESPTOOLPY_BEFORE_NORESET is not set +# default: +CONFIG_ESPTOOLPY_BEFORE="default-reset" +# default: +CONFIG_ESPTOOLPY_AFTER_RESET=y +# default: +# CONFIG_ESPTOOLPY_AFTER_NORESET is not set +# default: +CONFIG_ESPTOOLPY_AFTER="hard-reset" +# default: +CONFIG_ESPTOOLPY_MONITOR_BAUD=115200 +# end of Serial flasher config + +# +# Partition Table +# +# default: +CONFIG_PARTITION_TABLE_SINGLE_APP=y +# default: +# CONFIG_PARTITION_TABLE_SINGLE_APP_LARGE is not set +# default: +# CONFIG_PARTITION_TABLE_TWO_OTA is not set +# default: +# CONFIG_PARTITION_TABLE_TWO_OTA_LARGE is not set +# default: +# CONFIG_PARTITION_TABLE_CUSTOM is not set +# default: +CONFIG_PARTITION_TABLE_CUSTOM_FILENAME="partitions.csv" +# default: +CONFIG_PARTITION_TABLE_FILENAME="partitions_singleapp.csv" +# default: +CONFIG_PARTITION_TABLE_OFFSET=0x8000 +# default: +CONFIG_PARTITION_TABLE_MD5=y +# end of Partition Table + +# +# Compiler options +# +# default: +CONFIG_COMPILER_OPTIMIZATION_DEBUG=y +# default: +# CONFIG_COMPILER_OPTIMIZATION_SIZE is not set +# default: +# CONFIG_COMPILER_OPTIMIZATION_PERF is not set +# default: +# CONFIG_COMPILER_OPTIMIZATION_NONE is not set +# default: +CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_ENABLE=y +# default: +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_SILENT is not set +# default: +# CONFIG_COMPILER_OPTIMIZATION_ASSERTIONS_DISABLE is not set +# default: +# CONFIG_COMPILER_ASSERT_NDEBUG_EVALUATE is not set +# default: +CONFIG_COMPILER_FLOAT_LIB_FROM_GCCLIB=y +# default: +CONFIG_COMPILER_OPTIMIZATION_ASSERTION_LEVEL=2 +# default: +# CONFIG_COMPILER_OPTIMIZATION_CHECKS_SILENT is not set +# default: +CONFIG_COMPILER_HIDE_PATHS_MACROS=y +# default: +# CONFIG_COMPILER_CXX_EXCEPTIONS is not set +# default: +# CONFIG_COMPILER_CXX_RTTI is not set +# default: +CONFIG_COMPILER_STACK_CHECK_MODE_NONE=y +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_NORM is not set +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_STRONG is not set +# default: +# CONFIG_COMPILER_STACK_CHECK_MODE_ALL is not set +# default: +# CONFIG_COMPILER_NO_MERGE_CONSTANTS is not set +# default: +# CONFIG_COMPILER_WARN_WRITE_STRINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_DEFAULT_ERRORS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC12_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC13_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC14_WARNINGS is not set +# default: +# CONFIG_COMPILER_DISABLE_GCC15_WARNINGS is not set +# default: +# CONFIG_COMPILER_DUMP_RTL_FILES is not set +# default: +CONFIG_COMPILER_RT_LIB_GCCLIB=y +# default: +CONFIG_COMPILER_RT_LIB_NAME="gcc" +# default: +CONFIG_COMPILER_ORPHAN_SECTIONS_ERROR=y +# default: +# CONFIG_COMPILER_ORPHAN_SECTIONS_WARNING is not set +# default: +# CONFIG_COMPILER_ORPHAN_SECTIONS_PLACE is not set +# default: +# CONFIG_COMPILER_STATIC_ANALYZER is not set +# default: +CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_NO_CHANGE=y +# default: +# CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_COLD_CONSTEXPR is not set +# default: +# CONFIG_COMPILER_CXX_GLIBCXX_CONSTEXPR_COLD is not set +# end of Compiler options + +# +# Component config +# + +# +# !!! MINIMAL_BUILD is enabled !!! +# + +# +# Only common components and those transitively required by the main component are listed +# + +# +# If a component configuration is missing, please add it to the main component's requirements +# + +# +# Legacy Driver Configurations +# + +# +# Legacy TWAI Driver Configurations +# +# default: +# CONFIG_TWAI_ISR_IN_IRAM_LEGACY is not set +# default: +# CONFIG_TWAI_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_TWAI_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy TWAI Driver Configurations + +# +# Legacy I2C Driver Configurations +# +# default: +# CONFIG_I2C_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_I2C_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy I2C Driver Configurations + +# +# Legacy Touch Sensor Driver Configurations +# +# default: +# CONFIG_TOUCH_SUPPRESS_DEPRECATE_WARN is not set +# default: +# CONFIG_TOUCH_SKIP_LEGACY_CONFLICT_CHECK is not set +# end of Legacy Touch Sensor Driver Configurations +# end of Legacy Driver Configurations + +# +# eFuse Bit Manager +# +# default: +# CONFIG_EFUSE_CUSTOM_TABLE is not set +# default: +# CONFIG_EFUSE_VIRTUAL is not set +# default: +CONFIG_EFUSE_MAX_BLK_LEN=256 +# end of eFuse Bit Manager + +# +# Common ESP-related +# +# default: +CONFIG_ESP_ERR_TO_NAME_LOOKUP=y +# end of Common ESP-related + +# +# GDMA Configurations +# +# default: +CONFIG_GDMA_CTRL_FUNC_IN_IRAM=y +# default: +CONFIG_GDMA_ISR_HANDLER_IN_IRAM=y +# default: +CONFIG_GDMA_OBJ_DRAM_SAFE=y +# default: +# CONFIG_GDMA_ENABLE_DEBUG_LOG is not set +# end of GDMA Configurations + +# +# ESP-Driver:GPIO Configurations +# +# default: +# CONFIG_GPIO_CTRL_FUNC_IN_IRAM is not set +# end of ESP-Driver:GPIO Configurations + +# +# ESP-Driver:I2C Configurations +# +# default: +# CONFIG_I2C_ISR_IRAM_SAFE is not set +# default: +# CONFIG_I2C_ENABLE_DEBUG_LOG is not set +# default: +CONFIG_I2C_MASTER_ISR_HANDLER_IN_IRAM=y +# end of ESP-Driver:I2C Configurations + +# +# ESP-Driver:I2S Configurations +# +# default: +# CONFIG_I2S_ISR_IRAM_SAFE is not set +# default: +# CONFIG_I2S_CTRL_FUNC_IN_IRAM is not set +# default: +# CONFIG_I2S_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:I2S Configurations + +# +# ESP-Driver:SD Host SDMMC Controller Configurations +# +# default: +# CONFIG_SD_HOST_SDMMC_ISR_CACHE_SAFE is not set +# end of ESP-Driver:SD Host SDMMC Controller Configurations + +# +# ESP-Driver:SPI Configurations +# +# default: +CONFIG_SPI_MASTER_ISR_IN_IRAM=y +# default: +# CONFIG_SPI_SLAVE_IN_IRAM is not set +# default: +CONFIG_SPI_SLAVE_ISR_IN_IRAM=y +# end of ESP-Driver:SPI Configurations + +# +# ESP-Driver:UART Configurations +# +# default: +# CONFIG_UART_ISR_IN_IRAM is not set +# end of ESP-Driver:UART Configurations + +# +# ESP-Driver:UHCI Configurations +# +# default: +# CONFIG_UHCI_ISR_HANDLER_IN_IRAM is not set +# default: +# CONFIG_UHCI_ISR_CACHE_SAFE is not set +# default: +# CONFIG_UHCI_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:UHCI Configurations + +# +# ESP-Driver:USB Serial/JTAG Configuration +# +# default: +CONFIG_USJ_ENABLE_USB_SERIAL_JTAG=y +# end of ESP-Driver:USB Serial/JTAG Configuration + +# +# Hardware Settings +# +# default: +CONFIG_ESP_HW_SUPPORT_FUNC_IN_IRAM=y + +# +# Chip revision +# +# default: +CONFIG_ESP32S3_REV_MIN_0=y +# default: +# CONFIG_ESP32S3_REV_MIN_1 is not set +# default: +# CONFIG_ESP32S3_REV_MIN_2 is not set +# default: +CONFIG_ESP32S3_REV_MIN_FULL=0 +# default: +CONFIG_ESP_REV_MIN_FULL=0 + +# +# Maximum Supported ESP32-S3 Revision (Rev v0.99) +# +# default: +CONFIG_ESP32S3_REV_MAX_FULL=99 +# default: +CONFIG_ESP_REV_MAX_FULL=99 +# default: +CONFIG_ESP_EFUSE_BLOCK_REV_MIN_FULL=0 +# default: +CONFIG_ESP_EFUSE_BLOCK_REV_MAX_FULL=199 + +# +# Maximum Supported ESP32-S3 eFuse Block Revision (eFuse Block Rev v1.99) +# +# end of Chip revision + +# +# MAC Config +# +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_STA=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_WIFI_AP=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_BT=y +# default: +CONFIG_ESP_MAC_ADDR_UNIVERSE_ETH=y +# default: +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES_FOUR=y +# default: +CONFIG_ESP_MAC_UNIVERSAL_MAC_ADDRESSES=4 +# default: +# CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_TWO is not set +# default: +CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES_FOUR=y +# default: +CONFIG_ESP32S3_UNIVERSAL_MAC_ADDRESSES=4 +# default: +# CONFIG_ESP_MAC_USE_CUSTOM_MAC_AS_BASE_MAC is not set +# end of MAC Config + +# +# Sleep Config +# +# default: +CONFIG_ESP_SLEEP_FLASH_LEAKAGE_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_PSRAM_LEAKAGE_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_MSPI_NEED_ALL_IO_PU=y +# default: +CONFIG_ESP_SLEEP_RTC_BUS_ISO_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_GPIO_RESET_WORKAROUND=y +# default: +CONFIG_ESP_SLEEP_WAIT_FLASH_READY_EXTRA_DELAY=2000 +# default: +# CONFIG_ESP_SLEEP_CACHE_SAFE_ASSERTION is not set +# default: +# CONFIG_ESP_SLEEP_DEBUG is not set +# default: +CONFIG_ESP_SLEEP_GPIO_ENABLE_INTERNAL_RESISTORS=y +# end of Sleep Config + +# +# RTC Clock Config +# +# default: +CONFIG_RTC_CLK_SRC_INT_RC=y +# default: +# CONFIG_RTC_CLK_SRC_EXT_CRYS is not set +# default: +# CONFIG_RTC_CLK_SRC_EXT_OSC is not set +# default: +# CONFIG_RTC_CLK_SRC_INT_8MD256 is not set +# default: +CONFIG_RTC_CLK_CAL_CYCLES=1024 +# default: +CONFIG_RTC_CLK_FUNC_IN_IRAM=y +# default: +CONFIG_RTC_TIME_FUNC_IN_IRAM=y +# end of RTC Clock Config + +# +# Peripheral Control +# +# default: +CONFIG_ESP_PERIPH_CTRL_FUNC_IN_IRAM=y +# default: +CONFIG_ESP_REGI2C_CTRL_FUNC_IN_IRAM=y +# end of Peripheral Control + +# +# Main XTAL Config +# +# default: +CONFIG_XTAL_FREQ_40=y +# default: +CONFIG_XTAL_FREQ=40 +# end of Main XTAL Config + +# +# Power Supplier +# + +# +# Brownout Detector +# +# default: +CONFIG_ESP_BROWNOUT_DET=y +# default: +CONFIG_ESP_BROWNOUT_DET_LVL_SEL_7=y +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_6 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_5 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_4 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_3 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_2 is not set +# default: +# CONFIG_ESP_BROWNOUT_DET_LVL_SEL_1 is not set +# default: +CONFIG_ESP_BROWNOUT_DET_LVL=7 +# default: +CONFIG_ESP_BROWNOUT_USE_INTR=y +# end of Brownout Detector +# end of Power Supplier + +# default: +CONFIG_ESP_SPI_BUS_LOCK_ISR_FUNCS_IN_IRAM=y +# default: +CONFIG_ESP_INTR_IN_IRAM=y +# end of Hardware Settings + +# +# ESP-Driver:LCD Controller Configurations +# +# default: +# CONFIG_LCD_RGB_ISR_IRAM_SAFE is not set +CONFIG_LCD_RGB_RESTART_IN_VSYNC=y +# default: +# CONFIG_LCD_ENABLE_DEBUG_LOG is not set +# end of ESP-Driver:LCD Controller Configurations + +# +# LibC +# +# default: +# CONFIG_LIBC_NEWLIB is not set +# default: +CONFIG_LIBC_PICOLIBC=y +# default: +CONFIG_LIBC_PICOLIBC_NEWLIB_COMPATIBILITY=y +# default: +CONFIG_LIBC_MISC_IN_IRAM=y +# default: +CONFIG_LIBC_LOCKS_PLACE_IN_IRAM=y +# default: +CONFIG_LIBC_STDOUT_LINE_ENDING_CRLF=y +# default: +# CONFIG_LIBC_STDOUT_LINE_ENDING_LF is not set +# default: +# CONFIG_LIBC_STDOUT_LINE_ENDING_CR is not set +# default: +# CONFIG_LIBC_STDIN_LINE_ENDING_CRLF is not set +# default: +# CONFIG_LIBC_STDIN_LINE_ENDING_LF is not set +# default: +CONFIG_LIBC_STDIN_LINE_ENDING_CR=y +# default: +CONFIG_LIBC_TIME_SYSCALL_USE_RTC_HRT=y +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_RTC is not set +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_HRT is not set +# default: +# CONFIG_LIBC_TIME_SYSCALL_USE_NONE is not set +# default: +CONFIG_LIBC_ASSERT_BUFFER_SIZE=200 +# end of LibC + +# default: +CONFIG_STDATOMIC_S32C1I_SPIRAM_WORKAROUND=y + +# +# ESP-MM: Memory Management Configurations +# +# default: +# CONFIG_ESP_MM_CACHE_MSYNC_C2M_CHUNKED_OPS is not set +# end of ESP-MM: Memory Management Configurations + +# +# Partition API Configuration +# +# end of Partition API Configuration + +# +# Power Management +# +# default: +# CONFIG_PM_SLEEP_FUNC_IN_IRAM is not set +# default: +# CONFIG_PM_ENABLE is not set +# default: +# CONFIG_PM_SLP_IRAM_OPT is not set +# default: +CONFIG_PM_POWER_DOWN_CPU_IN_LIGHT_SLEEP=y +# default: +CONFIG_PM_RESTORE_CACHE_TAGMEM_AFTER_LIGHT_SLEEP=y +# default: +CONFIG_PM_ESP_SLEEP_POWER_DOWN_CPU=y +# end of Power Management + +# +# ESP PSRAM +# +CONFIG_SPIRAM=y + +# +# SPI RAM config +# +# CONFIG_SPIRAM_MODE_QUAD is not set +CONFIG_SPIRAM_MODE_OCT=y +CONFIG_SPIRAM_TYPE_AUTO=y +# CONFIG_SPIRAM_TYPE_ESPPSRAM64 is not set +# default: +CONFIG_SPIRAM_CLK_IO=30 +# default: +CONFIG_SPIRAM_CS_IO=26 +# CONFIG_SPIRAM_XIP_FROM_PSRAM is not set +# CONFIG_SPIRAM_FETCH_INSTRUCTIONS is not set +# CONFIG_SPIRAM_RODATA is not set +CONFIG_SPIRAM_SPEED_80M=y +# CONFIG_SPIRAM_SPEED_40M is not set +# default: +CONFIG_SPIRAM_SPEED=80 +# default: +# CONFIG_SPIRAM_ECC_ENABLE is not set +CONFIG_SPIRAM_BOOT_HW_INIT=y +CONFIG_SPIRAM_BOOT_INIT=y +CONFIG_SPIRAM_PRE_CONFIGURE_MEMORY_PROTECTION=y +# CONFIG_SPIRAM_IGNORE_NOTFOUND is not set +# CONFIG_SPIRAM_USE_MEMMAP is not set +# CONFIG_SPIRAM_USE_CAPS_ALLOC is not set +CONFIG_SPIRAM_USE_MALLOC=y +CONFIG_SPIRAM_MEMTEST=y +CONFIG_SPIRAM_MALLOC_ALWAYSINTERNAL=16384 +# CONFIG_SPIRAM_TRY_ALLOCATE_WIFI_LWIP is not set +CONFIG_SPIRAM_MALLOC_RESERVE_INTERNAL=32768 +# CONFIG_SPIRAM_ALLOW_BSS_SEG_EXTERNAL_MEMORY is not set +# CONFIG_SPIRAM_ALLOW_NOINIT_SEG_EXTERNAL_MEMORY is not set +# end of SPI RAM config +# end of ESP PSRAM + +# +# ESP Ringbuf +# +# default: +# CONFIG_RINGBUF_IN_IRAM is not set +# default: +# CONFIG_RINGBUF_PLACE_ISR_FUNCTIONS_INTO_FLASH is not set +# end of ESP Ringbuf + +# +# ESP-ROM +# +# default: +CONFIG_ESP_ROM_PRINT_IN_IRAM=y +# end of ESP-ROM + +# +# ESP Security Specific +# +# end of ESP Security Specific + +# +# ESP-STDIO +# +# default: +CONFIG_ESP_CONSOLE_UART_DEFAULT=y +# default: +# CONFIG_ESP_CONSOLE_USB_CDC is not set +# default: +# CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG is not set +# default: +# CONFIG_ESP_CONSOLE_UART_CUSTOM is not set +# default: +# CONFIG_ESP_CONSOLE_NONE is not set +# default: +# CONFIG_ESP_CONSOLE_SECONDARY_NONE is not set +# default: +CONFIG_ESP_CONSOLE_SECONDARY_USB_SERIAL_JTAG=y +# default: +CONFIG_ESP_CONSOLE_USB_SERIAL_JTAG_ENABLED=y +# default: +CONFIG_ESP_CONSOLE_UART=y +# default: +CONFIG_ESP_CONSOLE_UART_NUM=0 +# default: +CONFIG_ESP_CONSOLE_ROM_SERIAL_PORT_NUM=0 +# default: +CONFIG_ESP_CONSOLE_UART_BAUDRATE=115200 +# end of ESP-STDIO + +# +# ESP System Settings +# +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_80 is not set +# CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_160 is not set +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ_240=y +# default: +CONFIG_ESP_DEFAULT_CPU_FREQ_MHZ=240 + +# +# Cache config +# +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_16KB=y +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_32KB is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_SIZE=0x4000 +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_4WAYS is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_8WAYS=y +# default: +CONFIG_ESP32S3_ICACHE_ASSOCIATED_WAYS=8 +# default: +# CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_16B is not set +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_32B=y +# default: +CONFIG_ESP32S3_INSTRUCTION_CACHE_LINE_SIZE=32 +# default: +# CONFIG_ESP32S3_DATA_CACHE_16KB is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_32KB=y +# default: +# CONFIG_ESP32S3_DATA_CACHE_64KB is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_SIZE=0x8000 +# default: +# CONFIG_ESP32S3_DATA_CACHE_4WAYS is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_8WAYS=y +# default: +CONFIG_ESP32S3_DCACHE_ASSOCIATED_WAYS=8 +# default: +# CONFIG_ESP32S3_DATA_CACHE_LINE_16B is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_LINE_32B=y +# default: +# CONFIG_ESP32S3_DATA_CACHE_LINE_64B is not set +# default: +CONFIG_ESP32S3_DATA_CACHE_LINE_SIZE=32 +# end of Cache config + +# +# Memory +# +# default: +# CONFIG_ESP32S3_RTCDATA_IN_FAST_MEM is not set +# default: +# CONFIG_ESP32S3_USE_FIXED_STATIC_RAM_SIZE is not set +# end of Memory + +# +# Trace memory +# +# default: +# CONFIG_ESP32S3_TRAX is not set +# default: +CONFIG_ESP32S3_TRACEMEM_RESERVE_DRAM=0x0 +# end of Trace memory + +# default: +CONFIG_ESP_SYSTEM_IN_IRAM=y +# default: +# CONFIG_ESP_SYSTEM_PANIC_PRINT_HALT is not set +# default: +CONFIG_ESP_SYSTEM_PANIC_PRINT_REBOOT=y +# default: +# CONFIG_ESP_SYSTEM_PANIC_SILENT_REBOOT is not set +# default: +CONFIG_ESP_SYSTEM_PANIC_REBOOT_DELAY_SECONDS=0 +# default: +CONFIG_ESP_SYSTEM_RTC_FAST_MEM_AS_HEAP_DEPCHECK=y +# default: +CONFIG_ESP_SYSTEM_ALLOW_RTC_FAST_MEM_AS_HEAP=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT_PMS=y +# default: +CONFIG_ESP_SYSTEM_MEMPROT_PMS_LOCK=y +# default: +CONFIG_ESP_SYSTEM_EVENT_QUEUE_SIZE=32 +# default: +CONFIG_ESP_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +# default: +CONFIG_ESP_MAIN_TASK_STACK_SIZE=3584 +# default: +CONFIG_ESP_MAIN_TASK_AFFINITY_CPU0=y +# default: +# CONFIG_ESP_MAIN_TASK_AFFINITY_CPU1 is not set +# default: +# CONFIG_ESP_MAIN_TASK_AFFINITY_NO_AFFINITY is not set +# default: +CONFIG_ESP_MAIN_TASK_AFFINITY=0x0 +# default: +CONFIG_ESP_MINIMAL_SHARED_STACK_SIZE=2048 +# default: +CONFIG_ESP_INT_WDT=y +# default: +CONFIG_ESP_INT_WDT_TIMEOUT_MS=300 +# default: +CONFIG_ESP_INT_WDT_CHECK_CPU1=y +# default: +CONFIG_ESP_TASK_WDT_EN=y +# default: +CONFIG_ESP_TASK_WDT_INIT=y +# default: +# CONFIG_ESP_TASK_WDT_PANIC is not set +# default: +CONFIG_ESP_TASK_WDT_TIMEOUT_S=5 +# default: +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +# default: +CONFIG_ESP_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# default: +# CONFIG_ESP_PANIC_HANDLER_IRAM is not set +# default: +# CONFIG_ESP_DEBUG_STUBS_ENABLE is not set +# default: +CONFIG_ESP_DEBUG_OCDAWARE=y +# default: +CONFIG_ESP_SYSTEM_CHECK_INT_LEVEL_4=y +# default: +CONFIG_ESP_SYSTEM_BBPLL_RECALIB=y +# end of ESP System Settings + +# +# IPC (Inter-Processor Call) +# +# default: +CONFIG_ESP_IPC_ENABLE=y +# default: +CONFIG_ESP_IPC_TASK_STACK_SIZE=1280 +# default: +CONFIG_ESP_IPC_USES_CALLERS_PRIORITY=y +# default: +CONFIG_ESP_IPC_ISR_ENABLE=y +# end of IPC (Inter-Processor Call) + +# +# ESP Timer (High Resolution Timer) +# +# default: +CONFIG_ESP_TIMER_IN_IRAM=y +# default: +# CONFIG_ESP_TIMER_PROFILING is not set +# default: +CONFIG_ESP_TIME_FUNCS_USE_RTC_TIMER=y +# default: +CONFIG_ESP_TIME_FUNCS_USE_ESP_TIMER=y +# default: +CONFIG_ESP_TIMER_TASK_STACK_SIZE=3584 +# default: +CONFIG_ESP_TIMER_INTERRUPT_LEVEL=1 +# default: +# CONFIG_ESP_TIMER_SHOW_EXPERIMENTAL is not set +# default: +CONFIG_ESP_TIMER_TASK_AFFINITY=0x0 +# default: +CONFIG_ESP_TIMER_TASK_AFFINITY_CPU0=y +# default: +CONFIG_ESP_TIMER_ISR_AFFINITY_CPU0=y +# default: +# CONFIG_ESP_TIMER_SUPPORTS_ISR_DISPATCH_METHOD is not set +# default: +CONFIG_ESP_TIMER_IMPL_SYSTIMER=y +# end of ESP Timer (High Resolution Timer) + +# +# FAT Filesystem support +# +# default: +CONFIG_FATFS_VOLUME_COUNT=2 +# default: +# CONFIG_FATFS_LFN_NONE is not set +# default: +CONFIG_FATFS_LFN_HEAP=y +# default: +# CONFIG_FATFS_LFN_STACK is not set +# default: +# CONFIG_FATFS_SECTOR_512 is not set +# default: +CONFIG_FATFS_SECTOR_4096=y +# default: +# CONFIG_FATFS_CODEPAGE_DYNAMIC is not set +# default: +CONFIG_FATFS_CODEPAGE_437=y +# default: +# CONFIG_FATFS_CODEPAGE_720 is not set +# default: +# CONFIG_FATFS_CODEPAGE_737 is not set +# default: +# CONFIG_FATFS_CODEPAGE_771 is not set +# default: +# CONFIG_FATFS_CODEPAGE_775 is not set +# default: +# CONFIG_FATFS_CODEPAGE_850 is not set +# default: +# CONFIG_FATFS_CODEPAGE_852 is not set +# default: +# CONFIG_FATFS_CODEPAGE_855 is not set +# default: +# CONFIG_FATFS_CODEPAGE_857 is not set +# default: +# CONFIG_FATFS_CODEPAGE_860 is not set +# default: +# CONFIG_FATFS_CODEPAGE_861 is not set +# default: +# CONFIG_FATFS_CODEPAGE_862 is not set +# default: +# CONFIG_FATFS_CODEPAGE_863 is not set +# default: +# CONFIG_FATFS_CODEPAGE_864 is not set +# default: +# CONFIG_FATFS_CODEPAGE_865 is not set +# default: +# CONFIG_FATFS_CODEPAGE_866 is not set +# default: +# CONFIG_FATFS_CODEPAGE_869 is not set +# default: +# CONFIG_FATFS_CODEPAGE_932 is not set +# default: +# CONFIG_FATFS_CODEPAGE_936 is not set +# default: +# CONFIG_FATFS_CODEPAGE_949 is not set +# default: +# CONFIG_FATFS_CODEPAGE_950 is not set +# default: +CONFIG_FATFS_CODEPAGE=437 +# default: +CONFIG_FATFS_MAX_LFN=255 +# default: +CONFIG_FATFS_API_ENCODING_ANSI_OEM=y +# default: +# CONFIG_FATFS_API_ENCODING_UTF_8 is not set +# default: +CONFIG_FATFS_FS_LOCK=0 +# default: +CONFIG_FATFS_TIMEOUT_MS=10000 +# default: +CONFIG_FATFS_PER_FILE_CACHE=y +# default: +CONFIG_FATFS_ALLOC_PREFER_EXTRAM=y +# default: +# CONFIG_FATFS_USE_FASTSEEK is not set +# default: +CONFIG_FATFS_USE_STRFUNC_NONE=y +# default: +# CONFIG_FATFS_USE_STRFUNC_WITHOUT_CRLF_CONV is not set +# default: +# CONFIG_FATFS_USE_STRFUNC_WITH_CRLF_CONV is not set +# default: +CONFIG_FATFS_VFS_FSTAT_BLKSIZE=0 +# default: +# CONFIG_FATFS_IMMEDIATE_FSYNC is not set +# default: +# CONFIG_FATFS_USE_LABEL is not set +# default: +CONFIG_FATFS_LINK_LOCK=y +# default: +CONFIG_FATFS_USE_DYN_BUFFERS=y + +# +# File system free space calculation behavior +# +# default: +CONFIG_FATFS_DONT_TRUST_FREE_CLUSTER_CNT=0 +# default: +CONFIG_FATFS_DONT_TRUST_LAST_ALLOC=0 +# end of File system free space calculation behavior +# end of FAT Filesystem support + +# +# FreeRTOS +# + +# +# Kernel +# +# default: +# CONFIG_FREERTOS_SMP is not set +# default: +# CONFIG_FREERTOS_UNICORE is not set +# default: +CONFIG_FREERTOS_HZ=100 +# default: +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_NONE is not set +# default: +# CONFIG_FREERTOS_CHECK_STACKOVERFLOW_PTRVAL is not set +# default: +CONFIG_FREERTOS_CHECK_STACKOVERFLOW_CANARY=y +# default: +CONFIG_FREERTOS_THREAD_LOCAL_STORAGE_POINTERS=1 +# default: +CONFIG_FREERTOS_IDLE_TASK_STACKSIZE=1536 +# default: +# CONFIG_FREERTOS_USE_IDLE_HOOK is not set +# default: +# CONFIG_FREERTOS_USE_TICK_HOOK is not set +# default: +CONFIG_FREERTOS_MAX_TASK_NAME_LEN=16 +# default: +# CONFIG_FREERTOS_ENABLE_BACKWARD_COMPATIBILITY is not set +# default: +CONFIG_FREERTOS_USE_TIMERS=y +# default: +CONFIG_FREERTOS_TIMER_SERVICE_TASK_NAME="Tmr Svc" +# default: +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU0 is not set +# default: +# CONFIG_FREERTOS_TIMER_TASK_AFFINITY_CPU1 is not set +# default: +CONFIG_FREERTOS_TIMER_TASK_NO_AFFINITY=y +# default: +CONFIG_FREERTOS_TIMER_SERVICE_TASK_CORE_AFFINITY=0x7FFFFFFF +# default: +CONFIG_FREERTOS_TIMER_TASK_PRIORITY=1 +# default: +CONFIG_FREERTOS_TIMER_TASK_STACK_DEPTH=2048 +# default: +CONFIG_FREERTOS_TIMER_QUEUE_LENGTH=10 +# default: +CONFIG_FREERTOS_QUEUE_REGISTRY_SIZE=0 +# default: +CONFIG_FREERTOS_TASK_NOTIFICATION_ARRAY_ENTRIES=1 +# default: +# CONFIG_FREERTOS_USE_TRACE_FACILITY is not set +# default: +# CONFIG_FREERTOS_USE_LIST_DATA_INTEGRITY_CHECK_BYTES is not set +# default: +# CONFIG_FREERTOS_GENERATE_RUN_TIME_STATS is not set +# default: +# CONFIG_FREERTOS_USE_APPLICATION_TASK_TAG is not set +# end of Kernel + +# +# Port +# +# default: +CONFIG_FREERTOS_TASK_FUNCTION_WRAPPER=y +# default: +# CONFIG_FREERTOS_WATCHPOINT_END_OF_STACK is not set +# default: +CONFIG_FREERTOS_TLSP_DELETION_CALLBACKS=y +# default: +# CONFIG_FREERTOS_TASK_PRE_DELETION_HOOK is not set +# default: +CONFIG_FREERTOS_CHECK_MUTEX_GIVEN_BY_OWNER=y +# default: +CONFIG_FREERTOS_ISR_STACKSIZE=1536 +# default: +CONFIG_FREERTOS_INTERRUPT_BACKTRACE=y +# default: +# CONFIG_FREERTOS_FPU_IN_ISR is not set +# default: +CONFIG_FREERTOS_TICK_SUPPORT_SYSTIMER=y +# default: +CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL1=y +# default: +# CONFIG_FREERTOS_CORETIMER_SYSTIMER_LVL3 is not set +# default: +CONFIG_FREERTOS_SYSTICK_USES_SYSTIMER=y +# default: +# CONFIG_FREERTOS_IN_IRAM is not set +# default: +# CONFIG_FREERTOS_CHECK_PORT_CRITICAL_COMPLIANCE is not set +# end of Port + +# +# Extra +# +# default: +CONFIG_FREERTOS_TASK_CREATE_ALLOW_EXT_MEM=y +# end of Extra + +# default: +CONFIG_FREERTOS_PORT=y +# default: +CONFIG_FREERTOS_NO_AFFINITY=0x7FFFFFFF +# default: +CONFIG_FREERTOS_SUPPORT_STATIC_ALLOCATION=y +# default: +CONFIG_FREERTOS_DEBUG_OCDAWARE=y +# default: +CONFIG_FREERTOS_NUMBER_OF_CORES=2 +# end of FreeRTOS + +# +# Hardware Abstraction Layer (HAL) and Low Level (LL) +# +# default: +CONFIG_HAL_ASSERTION_EQUALS_SYSTEM=y +# default: +# CONFIG_HAL_ASSERTION_DISABLE is not set +# default: +# CONFIG_HAL_ASSERTION_SILENT is not set +# default: +# CONFIG_HAL_ASSERTION_ENABLE is not set +# default: +CONFIG_HAL_DEFAULT_ASSERTION_LEVEL=2 +# default: +CONFIG_HAL_WDT_USE_ROM_IMPL=y +# default: +CONFIG_HAL_GPIO_USE_ROM_IMPL=y +# end of Hardware Abstraction Layer (HAL) and Low Level (LL) + +# +# Heap memory debugging +# +# default: +CONFIG_HEAP_POISONING_DISABLED=y +# default: +# CONFIG_HEAP_POISONING_LIGHT is not set +# default: +# CONFIG_HEAP_POISONING_COMPREHENSIVE is not set +# default: +CONFIG_HEAP_TRACING_OFF=y +# default: +# CONFIG_HEAP_TRACING_STANDALONE is not set +# default: +# CONFIG_HEAP_TRACING_TOHOST is not set +# default: +# CONFIG_HEAP_USE_HOOKS is not set +# default: +# CONFIG_HEAP_TASK_TRACKING is not set +# default: +# CONFIG_HEAP_ABORT_WHEN_ALLOCATION_FAILS is not set +# default: +# CONFIG_HEAP_PLACE_FUNCTION_INTO_FLASH is not set +# end of Heap memory debugging + +# +# Log +# +# default: +CONFIG_LOG_VERSION_1=y +# default: +# CONFIG_LOG_VERSION_2 is not set +# default: +CONFIG_LOG_VERSION=1 + +# +# Log Level +# +# default: +# CONFIG_LOG_DEFAULT_LEVEL_NONE is not set +# default: +# CONFIG_LOG_DEFAULT_LEVEL_ERROR is not set +# default: +# CONFIG_LOG_DEFAULT_LEVEL_WARN is not set +# default: +CONFIG_LOG_DEFAULT_LEVEL_INFO=y +# default: +# CONFIG_LOG_DEFAULT_LEVEL_DEBUG is not set +# default: +# CONFIG_LOG_DEFAULT_LEVEL_VERBOSE is not set +# default: +CONFIG_LOG_DEFAULT_LEVEL=3 +# default: +CONFIG_LOG_MAXIMUM_EQUALS_DEFAULT=y +# default: +# CONFIG_LOG_MAXIMUM_LEVEL_DEBUG is not set +# default: +# CONFIG_LOG_MAXIMUM_LEVEL_VERBOSE is not set +# default: +CONFIG_LOG_MAXIMUM_LEVEL=3 + +# +# Level Settings +# +# default: +# CONFIG_LOG_MASTER_LEVEL is not set +# default: +CONFIG_LOG_DYNAMIC_LEVEL_CONTROL=y +# default: +# CONFIG_LOG_TAG_LEVEL_IMPL_NONE is not set +# default: +# CONFIG_LOG_TAG_LEVEL_IMPL_LINKED_LIST is not set +# default: +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_AND_LINKED_LIST=y +# default: +# CONFIG_LOG_TAG_LEVEL_CACHE_ARRAY is not set +# default: +CONFIG_LOG_TAG_LEVEL_CACHE_BINARY_MIN_HEAP=y +# default: +CONFIG_LOG_TAG_LEVEL_IMPL_CACHE_SIZE=31 +# end of Level Settings +# end of Log Level + +# +# Format +# +# default: +# CONFIG_LOG_COLORS is not set +# default: +CONFIG_LOG_TIMESTAMP_SOURCE_RTOS=y +# default: +# CONFIG_LOG_TIMESTAMP_SOURCE_SYSTEM is not set +# end of Format + +# +# Settings +# +# default: +CONFIG_LOG_MODE_TEXT_EN=y +# default: +CONFIG_LOG_MODE_TEXT=y +# end of Settings + +# default: +CONFIG_LOG_IN_IRAM=y +# end of Log + +# +# mbedTLS +# + +# +# Core Configuration +# +# default: +CONFIG_MBEDTLS_VER_4_X_SUPPORT=y +# default: +# CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_NONE is not set +# default: +CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_SIZE=y +# default: +# CONFIG_MBEDTLS_COMPILER_OPTIMIZATION_PERF is not set +# default: +CONFIG_MBEDTLS_FS_IO=y +# default: +CONFIG_MBEDTLS_THREADING_C=y +# default: +# CONFIG_MBEDTLS_THREADING_ALT is not set +# default: +CONFIG_MBEDTLS_THREADING_PTHREAD=y +# default: +CONFIG_MBEDTLS_ERROR_STRINGS=y +# default: +CONFIG_MBEDTLS_VERSION_C=y +# default: +CONFIG_MBEDTLS_HAVE_TIME=y +# default: +# CONFIG_MBEDTLS_PLATFORM_TIME_ALT is not set +# default: +# CONFIG_MBEDTLS_HAVE_TIME_DATE is not set +# default: +CONFIG_MBEDTLS_INTERNAL_MEM_ALLOC=y +# default: +# CONFIG_MBEDTLS_EXTERNAL_MEM_ALLOC is not set +# default: +# CONFIG_MBEDTLS_DEFAULT_MEM_ALLOC is not set +# default: +# CONFIG_MBEDTLS_CUSTOM_MEM_ALLOC is not set +# default: +CONFIG_MBEDTLS_ASYMMETRIC_CONTENT_LEN=y +# default: +CONFIG_MBEDTLS_SSL_IN_CONTENT_LEN=16384 +# default: +CONFIG_MBEDTLS_SSL_OUT_CONTENT_LEN=4096 +# default: +# CONFIG_MBEDTLS_DYNAMIC_BUFFER is not set +# default: +# CONFIG_MBEDTLS_VERSION_FEATURES is not set +# default: +# CONFIG_MBEDTLS_DEBUG is not set +# default: +CONFIG_MBEDTLS_SELF_TEST=y +# end of Core Configuration + +# +# Certificates +# +# default: +CONFIG_MBEDTLS_X509_USE_C=y +# default: +CONFIG_MBEDTLS_PEM_PARSE_C=y +# default: +CONFIG_MBEDTLS_PEM_WRITE_C=y +# default: +CONFIG_MBEDTLS_PK_C=y +# default: +CONFIG_MBEDTLS_PK_PARSE_C=y +# default: +CONFIG_MBEDTLS_PK_WRITE_C=y +# default: +# CONFIG_MBEDTLS_X509_REMOVE_INFO is not set +# default: +CONFIG_MBEDTLS_X509_CRL_PARSE_C=y +# default: +CONFIG_MBEDTLS_X509_CRT_PARSE_C=y +# default: +CONFIG_MBEDTLS_X509_CSR_PARSE_C=y +# default: +# CONFIG_MBEDTLS_X509_CREATE_C is not set +# default: +CONFIG_MBEDTLS_X509_RSASSA_PSS_SUPPORT=y +# default: +# CONFIG_MBEDTLS_X509_TRUSTED_CERT_CALLBACK is not set +# default: +CONFIG_MBEDTLS_ASN1_PARSE_C=y +# default: +CONFIG_MBEDTLS_ASN1_WRITE_C=y +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE=y + +# +# Certificate Bundle Configuration +# +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_FULL=y +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_CMN is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEFAULT_NONE is not set +# default: +# CONFIG_MBEDTLS_CUSTOM_CERTIFICATE_BUNDLE is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_DEPRECATED_LIST is not set +# default: +CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_MAX_CERTS=200 +# end of Certificate Bundle Configuration + +# default: +# CONFIG_MBEDTLS_ALLOW_WEAK_CERTIFICATE_VERIFICATION is not set +# default: +# CONFIG_MBEDTLS_CERTIFICATE_BUNDLE_CROSS_SIGNED_VERIFY is not set +# end of Certificates + +# default: +CONFIG_MBEDTLS_TLS_ENABLED=y + +# +# TLS Protocol Configuration +# +# default: +CONFIG_MBEDTLS_SSL_PROTO_TLS1_2=y +# default: +# CONFIG_MBEDTLS_SSL_PROTO_TLS1_3 is not set +# default: +# CONFIG_MBEDTLS_SSL_PROTO_GMTSSL1_1 is not set +# default: +CONFIG_MBEDTLS_TLS_SERVER=y +# default: +CONFIG_MBEDTLS_TLS_CLIENT=y +# default: +CONFIG_MBEDTLS_TLS_SERVER_AND_CLIENT=y +# default: +# CONFIG_MBEDTLS_TLS_SERVER_ONLY is not set +# default: +# CONFIG_MBEDTLS_TLS_CLIENT_ONLY is not set +# default: +# CONFIG_MBEDTLS_SSL_KEEP_PEER_CERTIFICATE is not set +# default: +# CONFIG_MBEDTLS_SSL_CONTEXT_SERIALIZATION is not set +# default: +CONFIG_MBEDTLS_SSL_CACHE_C=y +# default: +CONFIG_MBEDTLS_SSL_ALL_ALERT_MESSAGES=y + +# +# TLS Key Exchange Configuration +# +# default: +# CONFIG_MBEDTLS_PSK_MODES is not set +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_RSA=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ELLIPTIC_CURVE=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_RSA=y +# default: +CONFIG_MBEDTLS_KEY_EXCHANGE_ECDHE_ECDSA=y +# end of TLS Key Exchange Configuration + +# default: +CONFIG_MBEDTLS_SSL_SERVER_NAME_INDICATION=y +# default: +CONFIG_MBEDTLS_SSL_ALPN=y +# default: +CONFIG_MBEDTLS_SSL_MAX_FRAGMENT_LENGTH=y +# default: +# CONFIG_MBEDTLS_SSL_VARIABLE_BUFFER_LENGTH is not set +# default: +CONFIG_MBEDTLS_SSL_RENEGOTIATION=y +# default: +CONFIG_MBEDTLS_CLIENT_SSL_SESSION_TICKETS=y +# default: +CONFIG_MBEDTLS_SERVER_SSL_SESSION_TICKETS=y +# default: +# CONFIG_MBEDTLS_SSL_KEYING_MATERIAL_EXPORT is not set +# end of TLS Protocol Configuration + +# default: +# CONFIG_MBEDTLS_SSL_PROTO_DTLS is not set + +# +# Symmetric Ciphers +# +# default: +CONFIG_MBEDTLS_AES_C=y +# default: +# CONFIG_MBEDTLS_CAMELLIA_C is not set +# default: +# CONFIG_MBEDTLS_ARIA_C is not set +# default: +# CONFIG_MBEDTLS_DES_C is not set +# default: +CONFIG_MBEDTLS_CCM_C=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CBC=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CFB=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_CTR=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_OFB=y +# default: +CONFIG_MBEDTLS_CIPHER_MODE_XTS=y +# default: +CONFIG_MBEDTLS_GCM_C=y +# default: +# CONFIG_MBEDTLS_NIST_KW_C is not set +# default: +CONFIG_MBEDTLS_AES_ROM_TABLES=y +# default: +# CONFIG_MBEDTLS_AES_FEWER_TABLES is not set +# default: +# CONFIG_MBEDTLS_AES_ONLY_128_BIT_KEY_LENGTH is not set +# default: +CONFIG_MBEDTLS_CMAC_C=y +# end of Symmetric Ciphers + +# +# Asymmetric Ciphers +# +# default: +CONFIG_MBEDTLS_RSA_C=y +# default: +CONFIG_MBEDTLS_ECP_C=y + +# +# Supported Curves +# +# default: +CONFIG_MBEDTLS_ECP_DP_SECP256R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP384R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP521R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_SECP256K1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP256R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP384R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_BP512R1_ENABLED=y +# default: +CONFIG_MBEDTLS_ECP_DP_CURVE25519_ENABLED=y +# end of Supported Curves + +# +# Elliptic Curve Ciphers Configuration +# +# default: +CONFIG_MBEDTLS_ECP_NIST_OPTIM=y +# default: +# CONFIG_MBEDTLS_ECP_FIXED_POINT_OPTIM is not set +# default: +# CONFIG_MBEDTLS_DHM_C is not set +# default: +CONFIG_MBEDTLS_ECDH_C=y +# default: +# CONFIG_MBEDTLS_ECJPAKE_C is not set +# default: +CONFIG_MBEDTLS_ECDSA_C=y +# default: +CONFIG_MBEDTLS_PK_PARSE_EC_EXTENDED=y +# default: +CONFIG_MBEDTLS_PK_PARSE_EC_COMPRESSED=y +# default: +CONFIG_MBEDTLS_ECDSA_DETERMINISTIC=y +# default: +# CONFIG_MBEDTLS_ECP_RESTARTABLE is not set +# end of Elliptic Curve Ciphers Configuration +# end of Asymmetric Ciphers + +# +# Hash functions +# +# default: +# CONFIG_MBEDTLS_RIPEMD160_C is not set +# default: +CONFIG_MBEDTLS_MD_C=y +# default: +CONFIG_MBEDTLS_MD5_C=y +# default: +CONFIG_MBEDTLS_SHA1_C=y +# default: +# CONFIG_MBEDTLS_SHA224_C is not set +# default: +CONFIG_MBEDTLS_SHA256_C=y +# default: +CONFIG_MBEDTLS_SHA384_C=y +# default: +CONFIG_MBEDTLS_SHA512_C=y +# default: +# CONFIG_MBEDTLS_SHA3_C is not set +# default: +CONFIG_MBEDTLS_ROM_MD5=y +# end of Hash functions + +# +# Hardware Acceleration +# +# default: +CONFIG_MBEDTLS_HARDWARE_SHA=y +# default: +CONFIG_MBEDTLS_HARDWARE_MPI=y +# default: +CONFIG_MBEDTLS_LARGE_KEY_SOFTWARE_MPI=y +# default: +CONFIG_MBEDTLS_MPI_USE_INTERRUPT=y +# default: +CONFIG_MBEDTLS_MPI_INTERRUPT_LEVEL=0 +# default: +CONFIG_MBEDTLS_HARDWARE_AES=y +# default: +# CONFIG_MBEDTLS_AES_SOFT_FALLBACK is not set +# default: +CONFIG_MBEDTLS_GCM_SUPPORT_NON_AES_CIPHER=y +# default: +CONFIG_MBEDTLS_AES_USE_INTERRUPT=y +# default: +CONFIG_MBEDTLS_AES_INTERRUPT_LEVEL=0 +# default: +CONFIG_MBEDTLS_AES_HW_SMALL_DATA_LEN_OPTIM=y +# default: +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_SIGN is not set +# default: +# CONFIG_MBEDTLS_ATCA_HW_ECDSA_VERIFY is not set +# default: +# CONFIG_MBEDTLS_HARDWARE_RSA_DS_PERIPHERAL is not set +# end of Hardware Acceleration + +# +# Entropy and Random Number Generation +# +# default: +# CONFIG_MBEDTLS_ENTROPY_FORCE_SHA256 is not set +# default: +CONFIG_MBEDTLS_CTR_DRBG_C=y +# default: +CONFIG_MBEDTLS_HMAC_DRBG_C=y +# end of Entropy and Random Number Generation + +# +# Encoding/Decoding +# +# default: +CONFIG_MBEDTLS_BASE64_C=y +# default: +CONFIG_MBEDTLS_PKCS5_C=y +# default: +CONFIG_MBEDTLS_PKCS7_C=y +# default: +CONFIG_MBEDTLS_PKCS1_V15=y +# default: +CONFIG_MBEDTLS_PKCS1_V21=y +# end of Encoding/Decoding + +# +# Stream Cipher +# +# default: +# CONFIG_MBEDTLS_CHACHA20_C is not set +# end of Stream Cipher +# end of mbedTLS + +# +# PThreads +# +# default: +CONFIG_PTHREAD_TASK_PRIO_DEFAULT=5 +# default: +CONFIG_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +# default: +CONFIG_PTHREAD_STACK_MIN=768 +# default: +CONFIG_PTHREAD_DEFAULT_CORE_NO_AFFINITY=y +# default: +# CONFIG_PTHREAD_DEFAULT_CORE_0 is not set +# default: +# CONFIG_PTHREAD_DEFAULT_CORE_1 is not set +# default: +CONFIG_PTHREAD_TASK_CORE_DEFAULT=-1 +# default: +CONFIG_PTHREAD_TASK_NAME_DEFAULT="pthread" +# end of PThreads + +# +# SD Protocol Layer Configuration +# +# default: +CONFIG_SD_ENABLE_SDIO_SUPPORT=y +# end of SD Protocol Layer Configuration + +# +# MMU Config +# +# default: +CONFIG_MMU_PAGE_SIZE_64KB=y +# default: +CONFIG_MMU_PAGE_MODE="64KB" +# default: +CONFIG_MMU_PAGE_SIZE=0x10000 +# end of MMU Config + +# +# Main Flash configuration +# + +# +# SPI Flash behavior when brownout +# +# default: +CONFIG_SPI_FLASH_BROWNOUT_RESET_XMC=y +# default: +CONFIG_SPI_FLASH_BROWNOUT_RESET=y +# end of SPI Flash behavior when brownout + +# +# Optional and Experimental Features (READ DOCS FIRST) +# + +# +# Features here require specific hardware (READ DOCS FIRST!) +# +# default: +# CONFIG_SPI_FLASH_HPM_ENA is not set +# default: +CONFIG_SPI_FLASH_HPM_AUTO=y +# default: +# CONFIG_SPI_FLASH_HPM_DIS is not set +# default: +CONFIG_SPI_FLASH_HPM_ON=y +# default: +CONFIG_SPI_FLASH_HPM_DC_AUTO=y +# default: +# CONFIG_SPI_FLASH_HPM_DC_DISABLE is not set +# default: +# CONFIG_SPI_FLASH_AUTO_SUSPEND is not set +# default: +CONFIG_SPI_FLASH_SUSPEND_TSUS_VAL_US=50 +# default: +# CONFIG_SPI_FLASH_FORCE_ENABLE_XMC_C_SUSPEND is not set +# default: +# CONFIG_SPI_FLASH_FORCE_ENABLE_C6_H2_SUSPEND is not set +# default: +CONFIG_SPI_FLASH_PLACE_FUNCTIONS_IN_IRAM=y +# end of Optional and Experimental Features (READ DOCS FIRST) +# end of Main Flash configuration + +# +# SPI Flash driver +# +# default: +# CONFIG_SPI_FLASH_VERIFY_WRITE is not set +# default: +# CONFIG_SPI_FLASH_ENABLE_COUNTERS is not set +# default: +# CONFIG_SPI_FLASH_ROM_IMPL is not set +# default: +CONFIG_SPI_FLASH_DANGEROUS_WRITE_ABORTS=y +# default: +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_FAILS is not set +# default: +# CONFIG_SPI_FLASH_DANGEROUS_WRITE_ALLOWED is not set +# default: +# CONFIG_SPI_FLASH_BYPASS_BLOCK_ERASE is not set +# default: +CONFIG_SPI_FLASH_YIELD_DURING_ERASE=y +# default: +CONFIG_SPI_FLASH_ERASE_YIELD_DURATION_MS=20 +# default: +CONFIG_SPI_FLASH_ERASE_YIELD_TICKS=1 +# default: +CONFIG_SPI_FLASH_WRITE_CHUNK_SIZE=8192 +# default: +# CONFIG_SPI_FLASH_SIZE_OVERRIDE is not set +# default: +# CONFIG_SPI_FLASH_CHECK_ERASE_TIMEOUT_DISABLED is not set +# default: +# CONFIG_SPI_FLASH_OVERRIDE_CHIP_DRIVER_LIST is not set + +# +# Auto-detect flash chips +# +# default: +CONFIG_SPI_FLASH_VENDOR_XMC_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_GD_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_ISSI_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_MXIC_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_WINBOND_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_BOYA_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_VENDOR_TH_SUPPORT_ENABLED=y +# default: +CONFIG_SPI_FLASH_SUPPORT_ISSI_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_MXIC_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_GD_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_WINBOND_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_BOYA_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_TH_CHIP=y +# default: +CONFIG_SPI_FLASH_SUPPORT_MXIC_OPI_CHIP=y +# end of Auto-detect flash chips + +# default: +CONFIG_SPI_FLASH_ENABLE_ENCRYPTED_READ_WRITE=y +# end of SPI Flash driver + +# +# Virtual file system +# +# default: +CONFIG_VFS_SUPPORT_IO=y +# default: +CONFIG_VFS_SUPPORT_DIR=y +# default: +CONFIG_VFS_SUPPORT_SELECT=y +# default: +CONFIG_VFS_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# default: +# CONFIG_VFS_SELECT_IN_RAM is not set +# default: +# CONFIG_VFS_SUPPORT_TERMIOS is not set +# default: +CONFIG_VFS_MAX_COUNT=8 +# default: +# CONFIG_VFS_SUPPRESS_CTX_DEPRECATION is not set + +# +# Host File System I/O (Semihosting) +# +# default: +CONFIG_VFS_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# end of Host File System I/O (Semihosting) + +# default: +CONFIG_VFS_INITIALIZE_DEV_NULL=y +# end of Virtual file system + +# +# Wear Levelling +# +# default: +# CONFIG_WL_SECTOR_SIZE_512 is not set +# default: +CONFIG_WL_SECTOR_SIZE_4096=y +# default: +CONFIG_WL_SECTOR_SIZE=4096 +# end of Wear Levelling + +# +# ESP LCD TOUCH +# +# default: +CONFIG_ESP_LCD_TOUCH_MAX_POINTS=5 +# default: +CONFIG_ESP_LCD_TOUCH_MAX_BUTTONS=1 +# end of ESP LCD TOUCH + +# +# ESP LVGL PORT +# +# end of ESP LVGL PORT + +# +# LVGL configuration +# +# default: +CONFIG_LV_CONF_SKIP=y +# default: +# CONFIG_LV_CONF_MINIMAL is not set + +# +# Color Settings +# +# default: +# CONFIG_LV_COLOR_DEPTH_32 is not set +# default: +# CONFIG_LV_COLOR_DEPTH_24 is not set +# default: +CONFIG_LV_COLOR_DEPTH_16=y +# default: +# CONFIG_LV_COLOR_DEPTH_8 is not set +# default: +# CONFIG_LV_COLOR_DEPTH_1 is not set +# default: +CONFIG_LV_COLOR_DEPTH=16 +# end of Color Settings + +# +# Memory Settings +# +# default: +CONFIG_LV_USE_BUILTIN_MALLOC=y +# default: +# CONFIG_LV_USE_CLIB_MALLOC is not set +# default: +# CONFIG_LV_USE_MICROPYTHON_MALLOC is not set +# default: +# CONFIG_LV_USE_RTTHREAD_MALLOC is not set +# default: +# CONFIG_LV_USE_CUSTOM_MALLOC is not set +# default: +CONFIG_LV_USE_BUILTIN_STRING=y +# default: +# CONFIG_LV_USE_CLIB_STRING is not set +# default: +# CONFIG_LV_USE_CUSTOM_STRING is not set +# default: +CONFIG_LV_USE_BUILTIN_SPRINTF=y +# default: +# CONFIG_LV_USE_CLIB_SPRINTF is not set +# default: +# CONFIG_LV_USE_CUSTOM_SPRINTF is not set +# default: +CONFIG_LV_MEM_SIZE_KILOBYTES=64 +# default: +CONFIG_LV_MEM_POOL_EXPAND_SIZE_KILOBYTES=0 +# default: +CONFIG_LV_MEM_ADR=0x0 +# end of Memory Settings + +# +# HAL Settings +# +# default: +CONFIG_LV_DEF_REFR_PERIOD=33 +# default: +CONFIG_LV_DPI_DEF=130 +# end of HAL Settings + +# +# Operating System (OS) +# +# default: +CONFIG_LV_OS_NONE=y +# default: +# CONFIG_LV_OS_PTHREAD is not set +# default: +# CONFIG_LV_OS_FREERTOS is not set +# default: +# CONFIG_LV_OS_CMSIS_RTOS2 is not set +# default: +# CONFIG_LV_OS_RTTHREAD is not set +# default: +# CONFIG_LV_OS_WINDOWS is not set +# default: +# CONFIG_LV_OS_MQX is not set +# default: +# CONFIG_LV_OS_SDL2 is not set +# default: +# CONFIG_LV_OS_CUSTOM is not set +# end of Operating System (OS) + +# +# Rendering Configuration +# +# default: +CONFIG_LV_DRAW_BUF_STRIDE_ALIGN=1 +# default: +CONFIG_LV_DRAW_BUF_ALIGN=4 +# default: +CONFIG_LV_DRAW_LAYER_SIMPLE_BUF_SIZE=24576 +# default: +CONFIG_LV_DRAW_LAYER_MAX_MEMORY=0 +# default: +CONFIG_LV_USE_DRAW_SW=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_RGB565=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_RGB565_SWAPPED=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_RGB565A8=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_RGB888=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_XRGB8888=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_ARGB8888=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_ARGB8888_PREMULTIPLIED=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_L8=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_AL88=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_A8=y +# default: +CONFIG_LV_DRAW_SW_SUPPORT_I1=y +# default: +CONFIG_LV_DRAW_SW_I1_LUM_THRESHOLD=127 +# default: +CONFIG_LV_DRAW_SW_DRAW_UNIT_CNT=1 +# default: +# CONFIG_LV_USE_DRAW_ARM2D_SYNC is not set +# default: +# CONFIG_LV_USE_NATIVE_HELIUM_ASM is not set +# default: +CONFIG_LV_DRAW_SW_COMPLEX=y +# default: +# CONFIG_LV_USE_DRAW_SW_COMPLEX_GRADIENTS is not set +# default: +CONFIG_LV_DRAW_SW_SHADOW_CACHE_SIZE=0 +# default: +CONFIG_LV_DRAW_SW_CIRCLE_CACHE_SIZE=4 +# default: +CONFIG_LV_DRAW_SW_ASM_NONE=y +# default: +# CONFIG_LV_DRAW_SW_ASM_NEON is not set +# default: +# CONFIG_LV_DRAW_SW_ASM_HELIUM is not set +# default: +# CONFIG_LV_DRAW_SW_ASM_RISCV_V is not set +# default: +# CONFIG_LV_DRAW_SW_ASM_CUSTOM is not set +# default: +CONFIG_LV_USE_DRAW_SW_ASM=0 +# default: +# CONFIG_LV_USE_PXP is not set +# default: +# CONFIG_LV_USE_G2D is not set +# default: +# CONFIG_LV_USE_DRAW_DAVE2D is not set +# default: +# CONFIG_LV_USE_DRAW_SDL is not set +# default: +# CONFIG_LV_USE_DRAW_VG_LITE is not set +# default: +# CONFIG_LV_USE_VECTOR_GRAPHIC is not set +# default: +# CONFIG_LV_USE_DRAW_DMA2D is not set +# default: +# CONFIG_LV_USE_PPA is not set +# default: +# CONFIG_LV_USE_DRAW_EVE is not set +# end of Rendering Configuration + +# +# Feature Configuration +# + +# +# Logging +# +# default: +# CONFIG_LV_USE_LOG is not set +# end of Logging + +# +# Asserts +# +# default: +CONFIG_LV_USE_ASSERT_NULL=y +# default: +CONFIG_LV_USE_ASSERT_MALLOC=y +# default: +# CONFIG_LV_USE_ASSERT_STYLE is not set +# default: +# CONFIG_LV_USE_ASSERT_MEM_INTEGRITY is not set +# default: +# CONFIG_LV_USE_ASSERT_OBJ is not set +# default: +CONFIG_LV_ASSERT_HANDLER_INCLUDE="assert.h" +# end of Asserts + +# +# Debug +# +# default: +# CONFIG_LV_USE_REFR_DEBUG is not set +# default: +# CONFIG_LV_USE_LAYER_DEBUG is not set +# default: +# CONFIG_LV_USE_PARALLEL_DRAW_DEBUG is not set +# end of Debug + +# +# Others +# +# default: +# CONFIG_LV_ENABLE_GLOBAL_CUSTOM is not set +# default: +CONFIG_LV_CACHE_DEF_SIZE=0 +# default: +CONFIG_LV_IMAGE_HEADER_CACHE_DEF_CNT=0 +# default: +CONFIG_LV_GRADIENT_MAX_STOPS=2 +# default: +CONFIG_LV_COLOR_MIX_ROUND_OFS=128 +# default: +# CONFIG_LV_OBJ_STYLE_CACHE is not set +# default: +# CONFIG_LV_USE_OBJ_ID is not set +# default: +# CONFIG_LV_USE_OBJ_NAME is not set +# default: +# CONFIG_LV_USE_OBJ_PROPERTY is not set +# default: +# CONFIG_LV_USE_EXT_DATA is not set +# end of Others +# end of Feature Configuration + +# +# Compiler Settings +# +# default: +# CONFIG_LV_BIG_ENDIAN_SYSTEM is not set +# default: +CONFIG_LV_ATTRIBUTE_MEM_ALIGN_SIZE=1 +# default: +# CONFIG_LV_ATTRIBUTE_FAST_MEM_USE_IRAM is not set +# default: +# CONFIG_LV_USE_FLOAT is not set +# default: +# CONFIG_LV_USE_MATRIX is not set +# default: +# CONFIG_LV_USE_PRIVATE_API is not set +# end of Compiler Settings + +# +# Font Usage +# + +# +# Enable built-in fonts +# +# default: +# CONFIG_LV_FONT_MONTSERRAT_8 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_10 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_12 is not set +# default: +CONFIG_LV_FONT_MONTSERRAT_14=y +# default: +# CONFIG_LV_FONT_MONTSERRAT_16 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_18 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_20 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_22 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_24 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_26 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_28 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_30 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_32 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_34 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_36 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_38 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_40 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_42 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_44 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_46 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_48 is not set +# default: +# CONFIG_LV_FONT_MONTSERRAT_28_COMPRESSED is not set +# default: +# CONFIG_LV_FONT_DEJAVU_16_PERSIAN_HEBREW is not set +# default: +# CONFIG_LV_FONT_SOURCE_HAN_SANS_SC_14_CJK is not set +# default: +# CONFIG_LV_FONT_SOURCE_HAN_SANS_SC_16_CJK is not set +# default: +# CONFIG_LV_FONT_UNSCII_8 is not set +# default: +# CONFIG_LV_FONT_UNSCII_16 is not set +# end of Enable built-in fonts + +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_8 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_10 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_12 is not set +# default: +CONFIG_LV_FONT_DEFAULT_MONTSERRAT_14=y +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_16 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_18 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_20 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_22 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_24 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_26 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_28 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_30 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_32 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_34 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_36 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_38 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_40 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_42 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_44 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_46 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_48 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_MONTSERRAT_28_COMPRESSED is not set +# default: +# CONFIG_LV_FONT_DEFAULT_DEJAVU_16_PERSIAN_HEBREW is not set +# default: +# CONFIG_LV_FONT_DEFAULT_SOURCE_HAN_SANS_SC_14_CJK is not set +# default: +# CONFIG_LV_FONT_DEFAULT_SOURCE_HAN_SANS_SC_16_CJK is not set +# default: +# CONFIG_LV_FONT_DEFAULT_UNSCII_8 is not set +# default: +# CONFIG_LV_FONT_DEFAULT_UNSCII_16 is not set +# default: +# CONFIG_LV_FONT_FMT_TXT_LARGE is not set +# default: +# CONFIG_LV_USE_FONT_COMPRESSED is not set +# default: +CONFIG_LV_USE_FONT_PLACEHOLDER=y + +# +# Enable static fonts +# +# end of Enable static fonts +# end of Font Usage + +# +# Text Settings +# +# default: +CONFIG_LV_TXT_ENC_UTF8=y +# default: +# CONFIG_LV_TXT_ENC_ASCII is not set +# default: +CONFIG_LV_TXT_BREAK_CHARS=" ,.;:-_)}" +# default: +CONFIG_LV_TXT_LINE_BREAK_LONG_LEN=0 +# default: +CONFIG_LV_TXT_COLOR_CMD="#" +# default: +# CONFIG_LV_USE_BIDI is not set +# default: +# CONFIG_LV_USE_ARABIC_PERSIAN_CHARS is not set +# end of Text Settings + +# +# Widget Usage +# +# default: +CONFIG_LV_WIDGETS_HAS_DEFAULT_VALUE=y +# default: +CONFIG_LV_USE_ANIMIMG=y +# default: +CONFIG_LV_USE_ARC=y +# default: +CONFIG_LV_USE_ARCLABEL=y +# default: +CONFIG_LV_USE_BAR=y +# default: +CONFIG_LV_USE_BUTTON=y +# default: +CONFIG_LV_USE_BUTTONMATRIX=y +# default: +CONFIG_LV_USE_CALENDAR=y +# default: +# CONFIG_LV_CALENDAR_WEEK_STARTS_MONDAY is not set + +# +# Days name configuration +# +# default: +CONFIG_LV_MONDAY_STR="Mo" +# default: +CONFIG_LV_TUESDAY_STR="Tu" +# default: +CONFIG_LV_WEDNESDAY_STR="We" +# default: +CONFIG_LV_THURSDAY_STR="Th" +# default: +CONFIG_LV_FRIDAY_STR="Fr" +# default: +CONFIG_LV_SATURDAY_STR="Sa" +# default: +CONFIG_LV_SUNDAY_STR="Su" +# end of Days name configuration + +# default: +CONFIG_LV_USE_CALENDAR_HEADER_ARROW=y +# default: +CONFIG_LV_USE_CALENDAR_HEADER_DROPDOWN=y +# default: +# CONFIG_LV_USE_CALENDAR_CHINESE is not set +# default: +CONFIG_LV_USE_CANVAS=y +# default: +CONFIG_LV_USE_CHART=y +# default: +CONFIG_LV_USE_CHECKBOX=y +# default: +CONFIG_LV_USE_DROPDOWN=y +# default: +CONFIG_LV_USE_IMAGE=y +# default: +CONFIG_LV_USE_IMAGEBUTTON=y +# default: +CONFIG_LV_USE_KEYBOARD=y +# default: +CONFIG_LV_USE_LABEL=y +# default: +CONFIG_LV_LABEL_TEXT_SELECTION=y +# default: +CONFIG_LV_LABEL_LONG_TXT_HINT=y +# default: +CONFIG_LV_LABEL_WAIT_CHAR_COUNT=3 +# default: +CONFIG_LV_USE_LED=y +# default: +CONFIG_LV_USE_LINE=y +# default: +CONFIG_LV_USE_LIST=y +# default: +CONFIG_LV_USE_MENU=y +# default: +CONFIG_LV_USE_MSGBOX=y +# default: +CONFIG_LV_USE_ROLLER=y +# default: +CONFIG_LV_USE_SCALE=y +# default: +CONFIG_LV_USE_SLIDER=y +# default: +CONFIG_LV_USE_SPAN=y +# default: +CONFIG_LV_SPAN_SNIPPET_STACK_SIZE=64 +# default: +CONFIG_LV_USE_SPINBOX=y +# default: +CONFIG_LV_USE_SPINNER=y +# default: +CONFIG_LV_USE_SWITCH=y +# default: +CONFIG_LV_USE_TEXTAREA=y +# default: +CONFIG_LV_TEXTAREA_DEF_PWD_SHOW_TIME=1500 +# default: +CONFIG_LV_USE_TABLE=y +# default: +CONFIG_LV_USE_TABVIEW=y +# default: +CONFIG_LV_USE_TILEVIEW=y +# default: +CONFIG_LV_USE_WIN=y +# end of Widget Usage + +# +# Themes +# +# default: +CONFIG_LV_USE_THEME_DEFAULT=y +# default: +# CONFIG_LV_THEME_DEFAULT_DARK is not set +# default: +CONFIG_LV_THEME_DEFAULT_GROW=y +# default: +CONFIG_LV_THEME_DEFAULT_TRANSITION_TIME=80 +# default: +CONFIG_LV_USE_THEME_SIMPLE=y +# default: +# CONFIG_LV_USE_THEME_MONO is not set +# end of Themes + +# +# Layouts +# +# default: +CONFIG_LV_USE_FLEX=y +# default: +CONFIG_LV_USE_GRID=y +# end of Layouts + +# +# 3rd Party Libraries +# +# default: +CONFIG_LV_FS_DEFAULT_DRIVER_LETTER=0 +# default: +# CONFIG_LV_USE_FS_STDIO is not set +# default: +# CONFIG_LV_USE_FS_POSIX is not set +# default: +# CONFIG_LV_USE_FS_WIN32 is not set +# default: +# CONFIG_LV_USE_FS_FATFS is not set +# default: +# CONFIG_LV_USE_FS_MEMFS is not set +# default: +# CONFIG_LV_USE_FS_LITTLEFS is not set +# default: +# CONFIG_LV_USE_FS_ARDUINO_ESP_LITTLEFS is not set +# default: +# CONFIG_LV_USE_FS_ARDUINO_SD is not set +# default: +# CONFIG_LV_USE_FS_UEFI is not set +# default: +# CONFIG_LV_USE_FS_FROGFS is not set +# default: +# CONFIG_LV_USE_LODEPNG is not set +# default: +# CONFIG_LV_USE_LIBPNG is not set +# default: +# CONFIG_LV_USE_BMP is not set +# default: +# CONFIG_LV_USE_TJPGD is not set +# default: +# CONFIG_LV_USE_LIBJPEG_TURBO is not set +# default: +# CONFIG_LV_USE_LIBWEBP is not set +# default: +# CONFIG_LV_USE_GIF is not set +# default: +# CONFIG_LV_BIN_DECODER_RAM_LOAD is not set +# default: +# CONFIG_LV_USE_RLE is not set +# default: +# CONFIG_LV_USE_QRCODE is not set +# default: +# CONFIG_LV_USE_BARCODE is not set +# default: +# CONFIG_LV_USE_FREETYPE is not set +# default: +# CONFIG_LV_USE_TINY_TTF is not set +# default: +# CONFIG_LV_USE_RLOTTIE is not set +# default: +# CONFIG_LV_USE_THORVG is not set +# default: +# CONFIG_LV_USE_NANOVG is not set +# default: +# CONFIG_LV_USE_LZ4 is not set +# default: +# CONFIG_LV_USE_FFMPEG is not set +# end of 3rd Party Libraries + +# +# Others +# +# default: +# CONFIG_LV_USE_SNAPSHOT is not set +# default: +# CONFIG_LV_USE_SYSMON is not set +# default: +# CONFIG_LV_USE_PROFILER is not set +# default: +# CONFIG_LV_USE_MONKEY is not set +# default: +# CONFIG_LV_USE_GRIDNAV is not set +# default: +# CONFIG_LV_USE_FRAGMENT is not set +# default: +# CONFIG_LV_USE_IMGFONT is not set +# default: +CONFIG_LV_USE_OBSERVER=y +# default: +# CONFIG_LV_USE_IME_PINYIN is not set +# default: +# CONFIG_LV_USE_FILE_EXPLORER is not set +# default: +# CONFIG_LV_USE_FONT_MANAGER is not set +# default: +# CONFIG_LV_USE_TEST is not set +# default: +# CONFIG_LV_USE_TRANSLATION is not set +# default: +# CONFIG_LV_USE_COLOR_FILTER is not set +# default: +CONFIG_LVGL_VERSION_MAJOR=9 +# default: +CONFIG_LVGL_VERSION_MINOR=5 +# default: +CONFIG_LVGL_VERSION_PATCH=0 +# end of Others + +# +# Devices +# +# default: +# CONFIG_LV_USE_SDL is not set +# default: +# CONFIG_LV_USE_X11 is not set +# default: +# CONFIG_LV_USE_WAYLAND is not set +# default: +# CONFIG_LV_USE_LINUX_FBDEV is not set +# default: +# CONFIG_LV_USE_NUTTX is not set +# default: +# CONFIG_LV_USE_LINUX_DRM is not set +# default: +# CONFIG_LV_USE_TFT_ESPI is not set +# default: +# CONFIG_LV_USE_LOVYAN_GFX is not set +# default: +# CONFIG_LV_USE_EVDEV is not set +# default: +# CONFIG_LV_USE_LIBINPUT is not set +# default: +# CONFIG_LV_USE_ST7735 is not set +# default: +# CONFIG_LV_USE_ST7789 is not set +# default: +# CONFIG_LV_USE_ST7796 is not set +# default: +# CONFIG_LV_USE_ILI9341 is not set +# default: +# CONFIG_LV_USE_GENERIC_MIPI is not set +# default: +# CONFIG_LV_USE_NXP_ELCDIF is not set +# default: +# CONFIG_LV_USE_RENESAS_GLCDC is not set +# default: +# CONFIG_LV_USE_ST_LTDC is not set +# default: +# CONFIG_LV_USE_FT81X is not set +# default: +# CONFIG_LV_USE_UEFI is not set +# default: +# CONFIG_LV_USE_QNX is not set +# end of Devices + +# +# Examples +# +# default: +CONFIG_LV_BUILD_EXAMPLES=y +# end of Examples + +# +# Demos +# +# default: +CONFIG_LV_BUILD_DEMOS=y +# default: +# CONFIG_LV_USE_DEMO_WIDGETS is not set +# default: +# CONFIG_LV_USE_DEMO_KEYPAD_AND_ENCODER is not set +# default: +# CONFIG_LV_USE_DEMO_BENCHMARK is not set +# default: +# CONFIG_LV_USE_DEMO_RENDER is not set +# default: +# CONFIG_LV_USE_DEMO_STRESS is not set +# default: +# CONFIG_LV_USE_DEMO_MUSIC is not set +# default: +# CONFIG_LV_USE_DEMO_FLEX_LAYOUT is not set +# default: +# CONFIG_LV_USE_DEMO_MULTILANG is not set +# default: +# CONFIG_LV_USE_DEMO_SMARTWATCH is not set +# default: +# CONFIG_LV_USE_DEMO_EBIKE is not set +# default: +# CONFIG_LV_USE_DEMO_HIGH_RES is not set +# end of Demos +# end of LVGL configuration +# end of Component config + +# default: +# CONFIG_IDF_EXPERIMENTAL_FEATURES is not set + +# Deprecated options for backward compatibility +# CONFIG_APP_BUILD_TYPE_ELF_RAM is not set +# CONFIG_NO_BLOBS is not set +# CONFIG_APP_ROLLBACK_ENABLE is not set +# CONFIG_BOOTLOADER_COMPILER_OPTIMIZATION_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_NONE is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_ERROR is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_WARN is not set +CONFIG_LOG_BOOTLOADER_LEVEL_INFO=y +# CONFIG_LOG_BOOTLOADER_LEVEL_DEBUG is not set +# CONFIG_LOG_BOOTLOADER_LEVEL_VERBOSE is not set +CONFIG_LOG_BOOTLOADER_LEVEL=3 +# CONFIG_FLASH_ENCRYPTION_ENABLED is not set +# CONFIG_FLASHMODE_QIO is not set +# CONFIG_FLASHMODE_QOUT is not set +CONFIG_FLASHMODE_DIO=y +# CONFIG_FLASHMODE_DOUT is not set +CONFIG_MONITOR_BAUD=115200 +CONFIG_OPTIMIZATION_LEVEL_DEBUG=y +CONFIG_COMPILER_OPTIMIZATION_LEVEL_DEBUG=y +CONFIG_COMPILER_OPTIMIZATION_DEFAULT=y +# CONFIG_OPTIMIZATION_LEVEL_RELEASE is not set +# CONFIG_COMPILER_OPTIMIZATION_LEVEL_RELEASE is not set +CONFIG_OPTIMIZATION_ASSERTIONS_ENABLED=y +# CONFIG_OPTIMIZATION_ASSERTIONS_SILENT is not set +# CONFIG_OPTIMIZATION_ASSERTIONS_DISABLED is not set +CONFIG_OPTIMIZATION_ASSERTION_LEVEL=2 +# CONFIG_CXX_EXCEPTIONS is not set +CONFIG_STACK_CHECK_NONE=y +# CONFIG_STACK_CHECK_NORM is not set +# CONFIG_STACK_CHECK_STRONG is not set +# CONFIG_STACK_CHECK_ALL is not set +# CONFIG_WARN_WRITE_STRINGS is not set +CONFIG_ESP32S3_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP_SLEEP_DEEP_SLEEP_WAKEUP_DELAY=2000 +CONFIG_ESP32S3_RTC_CLK_SRC_INT_RC=y +# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_CRYS is not set +# CONFIG_ESP32S3_RTC_CLK_SRC_EXT_OSC is not set +# CONFIG_ESP32S3_RTC_CLK_SRC_INT_8MD256 is not set +CONFIG_ESP32S3_RTC_CLK_CAL_CYCLES=1024 +CONFIG_PERIPH_CTRL_FUNC_IN_IRAM=y +CONFIG_BROWNOUT_DET=y +CONFIG_ESP32S3_BROWNOUT_DET=y +CONFIG_BROWNOUT_DET_LVL_SEL_7=y +CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_7=y +# CONFIG_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_6 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_5 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_4 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_3 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_2 is not set +# CONFIG_BROWNOUT_DET_LVL_SEL_1 is not set +# CONFIG_ESP32S3_BROWNOUT_DET_LVL_SEL_1 is not set +CONFIG_BROWNOUT_DET_LVL=7 +CONFIG_ESP32S3_BROWNOUT_DET_LVL=7 +CONFIG_ESP_SYSTEM_BROWNOUT_INTR=y +CONFIG_NEWLIB_STDOUT_LINE_ENDING_CRLF=y +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_LF is not set +# CONFIG_NEWLIB_STDOUT_LINE_ENDING_CR is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_CRLF is not set +# CONFIG_NEWLIB_STDIN_LINE_ENDING_LF is not set +CONFIG_NEWLIB_STDIN_LINE_ENDING_CR=y +CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC_HRT=y +CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_SYSTIMER=y +CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC_FRC1=y +# CONFIG_NEWLIB_TIME_SYSCALL_USE_RTC is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_RTC is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_HRT is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_SYSTIMER is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_FRC1 is not set +# CONFIG_NEWLIB_TIME_SYSCALL_USE_NONE is not set +# CONFIG_ESP32S3_TIME_SYSCALL_USE_NONE is not set +CONFIG_ESP_SYSTEM_PM_POWER_DOWN_CPU=y +CONFIG_PM_POWER_DOWN_TAGMEM_IN_LIGHT_SLEEP=y +CONFIG_ESP32S3_SPIRAM_SUPPORT=y +CONFIG_DEFAULT_PSRAM_CLK_IO=30 +CONFIG_DEFAULT_PSRAM_CS_IO=26 +CONFIG_CONSOLE_UART_DEFAULT=y +# CONFIG_CONSOLE_UART_CUSTOM is not set +# CONFIG_CONSOLE_UART_NONE is not set +# CONFIG_ESP_CONSOLE_UART_NONE is not set +CONFIG_CONSOLE_UART=y +CONFIG_CONSOLE_UART_NUM=0 +CONFIG_CONSOLE_UART_BAUDRATE=115200 +# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_80 is not set +# CONFIG_ESP32S3_DEFAULT_CPU_FREQ_160 is not set +CONFIG_ESP32S3_DEFAULT_CPU_FREQ_240=y +CONFIG_ESP32S3_DEFAULT_CPU_FREQ_MHZ=240 +CONFIG_ESP_SYSTEM_PMP_IDRAM_SPLIT=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_VIA_TEE=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE=y +CONFIG_ESP_SYSTEM_MEMPROT_FEATURE_LOCK=y +CONFIG_SYSTEM_EVENT_QUEUE_SIZE=32 +CONFIG_SYSTEM_EVENT_TASK_STACK_SIZE=2304 +CONFIG_MAIN_TASK_STACK_SIZE=3584 +CONFIG_INT_WDT=y +CONFIG_INT_WDT_TIMEOUT_MS=300 +CONFIG_INT_WDT_CHECK_CPU1=y +CONFIG_TASK_WDT=y +CONFIG_ESP_TASK_WDT=y +# CONFIG_TASK_WDT_PANIC is not set +CONFIG_TASK_WDT_TIMEOUT_S=5 +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU0=y +CONFIG_TASK_WDT_CHECK_IDLE_TASK_CPU1=y +# CONFIG_ESP32_DEBUG_STUBS_ENABLE is not set +CONFIG_ESP32S3_DEBUG_OCDAWARE=y +CONFIG_IPC_TASK_STACK_SIZE=1280 +CONFIG_TIMER_TASK_STACK_SIZE=3584 +CONFIG_TIMER_TASK_PRIORITY=1 +CONFIG_TIMER_TASK_STACK_DEPTH=2048 +CONFIG_TIMER_QUEUE_LENGTH=10 +# CONFIG_ENABLE_STATIC_TASK_CLEAN_UP_HOOK is not set +CONFIG_SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY=y +# CONFIG_HAL_ASSERTION_SILIENT is not set +CONFIG_ESP32_PTHREAD_TASK_PRIO_DEFAULT=5 +CONFIG_ESP32_PTHREAD_TASK_STACK_SIZE_DEFAULT=3072 +CONFIG_ESP32_PTHREAD_STACK_MIN=768 +CONFIG_ESP32_DEFAULT_PTHREAD_CORE_NO_AFFINITY=y +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_0 is not set +# CONFIG_ESP32_DEFAULT_PTHREAD_CORE_1 is not set +CONFIG_ESP32_PTHREAD_TASK_CORE_DEFAULT=-1 +CONFIG_ESP32_PTHREAD_TASK_NAME_DEFAULT="pthread" +CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ABORTS=y +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_FAILS is not set +# CONFIG_SPI_FLASH_WRITING_DANGEROUS_REGIONS_ALLOWED is not set +CONFIG_SUPPRESS_SELECT_DEBUG_OUTPUT=y +# CONFIG_SUPPORT_TERMIOS is not set +CONFIG_SEMIHOSTFS_MAX_MOUNT_POINTS=1 +# End of deprecated options